Patent US4510016A successfully refreshed from Google Patents.
US4510016A
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Method of fabricating submicron silicon structures such as permeable base transistors
Assignee: Verizon Laboratories Inc
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Filing: 1982-12-09
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Granted: 1985-04-09
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Expires: 2002-12-09
Abstract
Abstract Submicron silicon structures are fabricated by repeat oxidation and stripping the walls of a U-groove leaving thin silicon fingers. This method may be used to fabricate a silicon transistor having an emitter and a collector separated by a channel. The channel is formed in a silicon finger by a Schottky base, which at zero bias pinches off conduction of the channel. A bias voltage on the Schottky base causes conduction. The channel has a very short length making the transistor capable of high frequency operation.
Inventors
- 👤 Jim-Yong Chi
- 👤 Roger P. Holmstrom
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 08:31
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/012; H10D30/202; Y; Y10; Y10S; Y10S438/00; Y10S438/911
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
79 words
A method of fabricating silicon structures, comprised of the following steps: a. forming a plurality of U-grooves in a semiconductor wafer with adjacent grooves defining a structure with a width equal to the distance between said grooves; b. forming an oxide layer upon the walls of said U-grooves; c. stripping said oxide layer from said walls, thereby reducing the width of said structure; and d. repeating steps b and c until the desired width of said structure is obtained.
Claim 2
Independent Claim
79 words
A method of fabricating silicon structures, comprised of the following steps: a. forming a plurality of U-grooves in a semiconductor wafer with adjacent grooves defining a structure with a width equal to the distance between said grooves; b. forming an oxide layer upon the walls of said U-grooves; c. stripping said oxide layer from said walls, thereby reducing the width of said structure; and d. repeating steps b and c until the desired width of said structure is obtained.
Claim 3
Dependent Claim
20 words
The method of claim 1 wherein said structure is one of a plurality of silicon fingers interleaved with said U-grooves.
Claim 4
Dependent Claim
40 words
The method of claim 1 wherein the distance between said U-grooves is initially about two micrometers apart and about three micrometers deep and steps b and c are repeated until the width of said structure is less than one micrometer.
Claim 5
Dependent Claim
20 words
The method of claim 3 wherein said structure is one of a plurality of silicon fingers interleaved with said U-grooves.
Claim 6
Dependent Claim
16 words
The method of claim 3 wherein the width of said structure is about one hundred nanometers.
Claim 7
Dependent Claim
20 words
The method of claim 5 wherein said structure is one of a plurality of silicon fingers interleaved with said U-grooves.
Claim 8
Dependent Claim
15 words
The method of claim 6 wherein said fingers include the emitter regions of a transistor.
Claim 9
Dependent Claim
13 words
The method of claim 7 wherein said transistor is a permeable base transistor.
Claim 10
Dependent Claim
23 words
The method of claim 1 wherein said wafer is orientated in the (110) direction and said structure is orientated in the (111) direction.
Claim 11
Dependent Claim
14 words
The method of claim 9 wherein said U-groove is formed by orientation-dependent chemical etching.
Claim 12
Dependent Claim
14 words
The method of claim 9 wherein said groove is formed by anisotropic plasma etching.
Claim 13
Independent Claim
149 words
A method of fabricating a silicon permeable base transistor, said method comprised of the following steps: providing a silicon wafer having an n + substrate and an n - epitaxial layer; providing an n + layer on top of the n - layer; masking the n + epitaxial layer; etching U-grooves through unmasked areas of the n + layer into the n - layer, said U-grooves separated by silicon fingers; implanting and diffusing an n dopant at the bottom of said grooves; oxidizing the walls of said grooves to form a layer of silicon dioxide; stripping said layer of silicon dioxide to reduce the width of the fingers; etching the n + diffused regions at the bottom of the grooves in order to change said regions into oxidized porous silicon; and depositing a metal layer on the bottom of said grooves and on the top of said silicon fingers.
Claim 14
Independent Claim
149 words
A method of fabricating a silicon permeable base transistor, said method comprised of the following steps: providing a silicon wafer having an n + substrate and an n - epitaxial layer; providing an n + layer on top of the n - layer; masking the n + epitaxial layer; etching U-grooves through unmasked areas of the n + layer into the n - layer, said U-grooves separated by silicon fingers; implanting and diffusing an n dopant at the bottom of said grooves; oxidizing the walls of said grooves to form a layer of silicon dioxide; stripping said layer of silicon dioxide to reduce the width of the fingers; etching the n + diffused regions at the bottom of the grooves in order to change said regions into oxidized porous silicon; and depositing a metal layer on the bottom of said grooves and on the top of said silicon fingers.
Claim 15
Dependent Claim
23 words
The method of claim 12 wherein said n + layer is formed by implanting an n type dopant in the n - layer.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-04-08 | 1988-10-08 | 1989-04-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-04-08 | 1992-10-08 | 1993-04-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-04-08 | 1996-10-08 | 1997-04-09 | $7700.00 | Window Closed / Lapsed |