Patent US4509019A successfully refreshed from Google Patents.
← Back to Patent Explorer
US4509019A Expired / Lapsed US ⏱️ 0.0 years remaining

Tunable active filter

Assignee: Nokia Bell Labs
•
Filing: 1983-01-27
•
Granted: 1985-04-02
•
Expires: 2003-01-27
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A tunable high-pass or low-pass filter employs a balanced amplifier having electronically controlled elements in either the two input or the two feedback paths (or both). A reactive element is placed in the other of the paths. Especially low distortion results from this arrangement, allowing convenient integrated circuit implementation with a nonlinear device (e.g., MOS transistor) as a voltage-controllable element. Multiple stages can be cascaded and controlled from a reference clock or other precision source for high accuracy.

Inventors

  • 👤 Mihai Banu
  • 👤 Yannis Tsividis

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 12:34
CPC Classifications
H; H03; H03H; H03H11/00; H03H11/02; H03H11/04; H03H11/12; H03G; H03G5/00; H03H11/1291

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 128 words
A filter comprising a balanced amplifier having an inverting input and a noninverting input, and an inverted output and a noninverted output, wherein a pair of first and second input paths are connected to said inverting input and said noninverting input, respectively, and wherein a pair of first and second feedback paths are connected between said noninverted output and said inverting input, and between said inverted output and said noninverting input, respectively, and wherein at least one of said pair of paths comprises an electronically controlled resistance in the form of a field effect transistor in each of said first and second paths therein, and wherein at least the other of said pair of paths comprises a reactive element in each of said first and second paths therein.
Claim 2
Dependent Claim 128 words
A filter comprising a balanced amplifier having an inverting input and a noninverting input, and an inverted output and a noninverted output, wherein a pair of first and second input paths are connected to said inverting input and said noninverting input, respectively, and wherein a pair of first and second feedback paths are connected between said noninverted output and said inverting input, and between said inverted output and said noninverting input, respectively, and wherein at least one of said pair of paths comprises an electronically controlled resistance in the form of a field effect transistor in each of said first and second paths therein, and wherein at least the other of said pair of paths comprises a reactive element in each of said first and second paths therein.
Claim 3
Dependent Claim 12 words
The filter of claim 1 wherein said reactive element is a capacitor.
Claim 4
Dependent Claim 28 words
The filter of claim 1 wherein said input paths each comprise said controlled resistance, and said feedback paths each comprises a capacitor, whereby a low-pass filter is obtained.
Claim 5
Dependent Claim 30 words
The filter of claim 1 wherein each of said input paths comprises a capacitor, and each of said feedback paths comprises said controlled resistance, whereby a high-pass filter is obtained.
Claim 6
Dependent Claim 22 words
The filter of claim 1 wherein the electronically controlled resistances therein are adapted to being controlled by reference to a precision source.
Claim 7
Dependent Claim 17 words
The filter of claim 1 wherein all of said elements are included on a single semiconductor chip.
Claim 8
Dependent Claim 50 words
The filter of claim 1 wherein the nonlinearity of said controlled resistances is sufficiently cancelled so that the total harmonic distortion introduced by said filter is at least 20 decibels less than if said controlled resistance and said reactance are located in only one of said first and second paths.

References Cited (Backward Citations)

US3500223A Cited
US3747007A Cited
US4329599A Cited
US4356451A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1988-04-01 1988-10-01 1989-04-02 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1992-04-01 1992-10-01 1993-04-02 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1996-04-01 1996-10-01 1997-04-02 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag