Sampling frequency converter

Claim 2

A signal frequency converter comprising: (a) an input delay line for carrying an input signal, said input delay line including a plurality of taps; (b) first sampling means for sampling the input signal at first predetermined tap locations of the input delay line at first predetermined times; (c) an output delay line having a plurality of second predetermined tap locations with different delay times between taps than the input delay line; and (d) second sampling means for applying the samples of the input signals to the second predetermined tap locations at second predetermined times to generate an output signal in said output delay line having a frequency different from the frequency of the input signal.

Claim 3

A signal frequency converter as defined in claim 1, in which the output delay line has a delay between tap locations longer than the delay of the input delay line between tap locations causing the output signal to be down-converted from the input signal.

Claim 4

A signal frequency converter as defined in claim 1, in which the output delay line has a delay between tap locations shorter than the delay of the input delay line between tap locations causing the output signal to be up-converted from the input signal.

Claim 5

A signal frequency converter as defined in claim 2 or 3, in which the sampling rate of the first sampling corresponds to the sampling rate of the output delay line.

Claim 6

A signal frequency converter as defined in claim 1, in which the frequency conversion factor is the ratio of the time delays between taps of the output delay line and the time delays between taps of the input delay line under simultaneous sampling conditions.

Claim 7

A signal frequency converter as defined in claim 1, in which the output delay line has delays between tap locations varying according to a predetermined function, to generate an output signal having a frequency varying in accordance with said function relative to the frequency of the input signal.

Claim 8

A signal frequency converter as defined in claim 1, in which the output delay line has a delay that changes linearly between adjacent tap locations.

Claim 9

A signal frequency converter as defined in claim 7 in which the sampling rate for the output delay line corresponds to the delay time of the output delay line.

Claim 10

A signal frequency converter as defined in claim 1, in which the signal carried by the input line is a continuous wave, further including means for time shifting successive sampling times of the second sampling means in accordance with a code to provide a phase code modulated output signal.

Claim 13

A signal frequency converter comprising: (a) an input delay line for carrying an input signal, said input delay line having a plurality of first predetermined tap locations; (b) an output delay line having a plurality of second predetermined tap locations with different delay times between taps than said input delay line; (c) input sampling and switching means coupled to said input delay line for sampling an input signal; (d) storage means for storing signals from said input sampling and switching means; (e) output sampling and switching means coupled to said output delay line; (f) buffer amplifier means coupled between said storage means and said output sampling and switching means for isolating said input means from effects of load impedance variations of said output means; and (g) control means for applying read pulses for switching said input sampling and switching means to pass said input signal to said storage means and for applying write pulses for switching said output sampling and switching means to pass said stored signal through said buffer amplifier to said output delay line for transmission at a different frequency then said input signal.

Claim 14

A signal frequency converter comprising: (a) an input delay line for carrying an input signal, said input delay line having a plurality of first predetermined tap locations; (b) an output delay line having a plurality of second predetermined tap locations with different delay times between taps than said input delay line; (c) input sampling and switching means coupled to said input delay line for sampling an input signal; (d) storage means for storing signals from said input sampling and switching means; (e) output sampling and switching means coupled to said output delay line; (f) buffer amplifier means coupled between said storage means and said output sampling and switching means for isolating said input means from effects of load impedance variations of said output means; and (g) control means for applying read pulses for switching said input sampling and switching means to pass said input signal to said storage means and for applying write pulses for switching said output sampling and switching means to pass said stored signal through said buffer amplifier to said output delay line for transmission at a different frequency then said input signal.