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Patent US4500931A successfully refreshed from Google Patents.
US4500931A
Expired / Lapsed
US
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Signal sampling gate circuit
Assignee: Toshiba Corp
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Filing: 1983-12-12
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Granted: 1985-02-19
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Expires: 2003-12-12
Abstract
Abstract Signal sampling transistors, to which signals to be sampled are coupled under the control of a first gate signal, and which couples these signals to holds circuits according to the first gate signal, are provided. A switching circuit for differentially switching the signal sampling transistors to complementarily turn off one of these transistors is also provided. This switching circuit includes transistors, one of which is turned on while the other is turned off according to a second gate signal. The individual switching circuit transistors are connected to the respective sampling transistors. With this arrangement, of the sampling transistors one to which the "on" state one of the switching circuit transistors is connected is turned off while the other is turned on. Thus, the conduction state of the sampling transistors for coupling the aforementioned signals to be sampled to the hold circuits can be forcibly controlled by the second gate signal irrespective of the first gate signal.
Inventors
- 👤 Shinichiro Taguchi
- 👤 Nobuya Nagao
- 👤 Yutaka Ogihara
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 06:46
CPC Classifications
H; H04; H04N; H04N9/00; H04N9/79; H04N9/793
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
307 words
A signal sampling gate circuit in a color video tape recording/reproducing device, having at least two reproducing heads which are alternately switched by a head switch pulse for processing a color signal, comprising: means (17) for generating a sample signal and processing said color signal; a sample signal input terminal (T20) to which said sample signal is supplied; a first hold circuit for holding the sample signal supplied to said sample signal input terminal; a first sample signal gate circuit for connecting said sample signal input terminal and said first hold circuit, in response to a sampling pulse when in a low impedance state, and disconnecting said sample signal input terminal from said first hold circuit in response to said sampling pulse when in a high impedance state; a second hold circuit for holding the sample signal supplied to said sample signal input terminal; a second sample signal gate circuit for connecting said sample signal input terminal and said second hold circuit, in response to the sampling pulse when in a low impedance state, and disconnecting said sample signal input terminal from said second hold circuit when in a high impedance state, said second signal gate circuit functioning in complementary fashion with respect to said first sample signal gate circuit; gate circuit driving means for selectively and complementarily driving said first and second sample signal gate circuits in response to the head switch pulse having a different period from that of said sampling rate; and sample signal gate circuit control means for controlling selectively said first and second sample signal gate circuits in one of the low and high impedance states in response to said head switch pulse; whereby said sample signal is held in said first and second hold circuits in response to the head switch pulse as a control signal for processing the color signal.
Claim 2
Dependent Claim
307 words
A signal sampling gate circuit in a color video tape recording/reproducing device, having at least two reproducing heads which are alternately switched by a head switch pulse for processing a color signal, comprising: means (17) for generating a sample signal and processing said color signal; a sample signal input terminal (T20) to which said sample signal is supplied; a first hold circuit for holding the sample signal supplied to said sample signal input terminal; a first sample signal gate circuit for connecting said sample signal input terminal and said first hold circuit, in response to a sampling pulse when in a low impedance state, and disconnecting said sample signal input terminal from said first hold circuit in response to said sampling pulse when in a high impedance state; a second hold circuit for holding the sample signal supplied to said sample signal input terminal; a second sample signal gate circuit for connecting said sample signal input terminal and said second hold circuit, in response to the sampling pulse when in a low impedance state, and disconnecting said sample signal input terminal from said second hold circuit when in a high impedance state, said second signal gate circuit functioning in complementary fashion with respect to said first sample signal gate circuit; gate circuit driving means for selectively and complementarily driving said first and second sample signal gate circuits in response to the head switch pulse having a different period from that of said sampling rate; and sample signal gate circuit control means for controlling selectively said first and second sample signal gate circuits in one of the low and high impedance states in response to said head switch pulse; whereby said sample signal is held in said first and second hold circuits in response to the head switch pulse as a control signal for processing the color signal.
Claim 3
Dependent Claim
38 words
A signal sampling gate circuit according to claim 1, wherein said sample signal generating circuit is an ACC detector for producing an ACC detection signal from the color signal, and said sampling pulse is a burst gate pulse.
Claim 4
Dependent Claim
261 words
A signal sampling gate circuit according to claim 1, wherein said first sample signal gate circuit includes a first transistor which functions as an emitter follower amplifier, for said sample signal supplied to said sample signal input terminal in order to transmit said sample signal to said first hold circuit, a second transistor connected in series to said first transistor in order to form a discharge path for surplus charges of said first hold circuit, and a third transistor which forms a differential pair with said second transistor in order to construct a first differential switch that responds to said sampling pulse; said second sample signal gate includes a fourth transistor which functions as an emitter follower amplifier for said sample signal supplied to said sample signal input terminal in order to transmit said sample signal to said second hold circuit, a fifth transistor connected in series to said fourth transistor in order to form a discharge path for surplus charges of said second hold circuit, and a sixth transistor which forms a differential pair with said fifth transistor in order to construct a second differential switch that responds to said sampling pulse in complementary fashion with said first differential switch; said gate circuit driving means includes a third differential switch which drives said first and second sample signal gate circuits in response to said head switch pulse; and said sample signal gate circuit control means forces one of said first and second sample signal gate circuits to be in a high impedance state in response to said head switch pulse.
Claim 5
Dependent Claim
25 words
A signal sampling gate circuit according to claim 3, wherein the frequency of said sampling pulse is higher than the frequency of said control pulse.
Claim 6
Dependent Claim
56 words
A signal sampling gate circuit according to claim 2, wherein the sample signal obtained in the first and second hold circuits is used as a gain control signal for an ACC amplifier and controls the gain of the color signal coupled to said ACC detector; said sample signal also being used as a color killer signal.
Claim 7
Dependent Claim
56 words
A signal sampling gate circuit according to claim 2, wherein the sample signal obtained in the first and second hold circuits is used as a color killer control signal for inhibiting color signal output with respect to a mixer circuit for providing an output signal obtained as a result of mixing luminance signal and color signal.
Claim 8
Dependent Claim
53 words
A signal sampling gate circuit according to claim 2, wherein the sample signal obtained in the first and second hold circuits is used as a gain control signal for ACC amplifier and controls the gain of the color signal coupled to said ACC detector after its use as a color killer control signal.
Claim 9
Dependent Claim
67 words
A signal sampling gate circuit according to claim 2, which further comprises a color amplifier for amplifying the color signal to be detected and for providing said ACC detection signal coupled to said sample signal input terminal, the gain of said color amplifier controlled according to the sample signal supplied from said first and second hold circuits being equal to a recording mode and a reproduction mode.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-02-19 | 1988-08-20 | 1989-02-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-02-19 | 1992-08-20 | 1993-02-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-02-19 | 1996-08-20 | 1997-02-19 | $7700.00 | Window Closed / Lapsed |