US4497108A
Expired / Lapsed
US
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Method for manufacturing semiconductor device by controlling thickness of insulating film at peripheral portion of element formation region
Assignee: Toshiba Corp
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Filing: 1983-05-17
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Granted: 1985-02-05
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Expires: 2003-05-17
Abstract
Abstract A method of manufacturing a semiconductor device wherein a thickness of an insulating film at a peripheral portion of an element formation region of a semiconductor substrate is increased. The feature of this method is that an antioxidant film is formed on the element formation region and subsequently said semiconductor substrate is exposed to an oxygen atmosphere, thereby locally oxidizing that portion of the film which surrounds said element formation region.
Inventors
- 👤 Kei Kurosawa
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 17:25
CPC Classifications
H; H10; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/012; H10W10/0121; H10W10/014; H10W10/10; H10W10/13; H10W10/17; Y; Y10; Y10S; Y10S438/00; Y10S438/981
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
126 words
A method for manufacturing a semiconductor device wherein a thickness of an insulating film at a pheripheral portion of an element formation region is controlled, which comprises the steps of: forming an antietching mask on a semiconductor substrate through an antioxidant film, said antietching mask being formed except at a prospective field region; selectively etching a prospective field region to form a groove; depositing a field insulating film in said groove so as to have a flat surface; and then exposing said semiconductor substrate in an oxygen atmosphere while said antioxidant film is left thereon, thereby locally oxidizing a surface portion of said semiconductor substrate surrounding said element formation region; and forming a desired element in said element formation region isolated by said field insulating film.
Claim 2
Independent Claim
126 words
A method for manufacturing a semiconductor device wherein a thickness of an insulating film at a pheripheral portion of an element formation region is controlled, which comprises the steps of: forming an antietching mask on a semiconductor substrate through an antioxidant film, said antietching mask being formed except at a prospective field region; selectively etching a prospective field region to form a groove; depositing a field insulating film in said groove so as to have a flat surface; and then exposing said semiconductor substrate in an oxygen atmosphere while said antioxidant film is left thereon, thereby locally oxidizing a surface portion of said semiconductor substrate surrounding said element formation region; and forming a desired element in said element formation region isolated by said field insulating film.
Claim 3
Dependent Claim
110 words
A method according to claim 1, wherein said step of depositing a field insulating film comprises the steps of selectively forming a first insulating film with a narrow groove around said element formation region using said antietching mask as a liftoff material, depositing a second insulating film so as to cover an entire surface which includes said narrow groove, applying a flowable material film to a surface of said second insulating film so as to obtain a structure which has a flat surface, and uniformly etching said flowable material film and said first and second insulating film so as to leave said second insulating film only in said narrow groove.
Claim 4
Dependent Claim
52 words
A method according to claim 1, wherein said step of exposing said semiconductor substrate in an oxygen atmosphere comprises the step of forming an oxide film such that a peripheral portion of said oxide film has a thickness greater than a thickness of a central portion thereof by 0.1 to 0.2 μm.
Claim 5
Dependent Claim
31 words
A method according to claim 1, wherein said antioxidant film in the step of forming a antietching mask is formed through a thermal oxide film preliminarily formed on said semiconductor substrate.
References Cited (Backward Citations)
US4419813A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-02-05 | 1988-08-06 | 1989-02-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-02-05 | 1992-08-06 | 1993-02-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-02-05 | 1996-08-06 | 1997-02-05 | $7700.00 | Window Closed / Lapsed |