US4419813A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method for fabricating semiconductor device
Assignee: Toshiba Corp
•
Filing: 1981-11-27
•
Granted: 1983-12-13
•
Expires: 2001-11-27
Abstract
Abstract A method for forming an isolation region on a semiconductor substrate which comprises steps of forming first a groove in said substrate, filling the groove with a first insulating film in a manner which may inevitably leave a gap between the wall of the groove and the each side of the first insulating film, forming a second insulating film on the surface of said substrate including said groove, and removing a surface layer of said second insulating film thereby forming an isolation region in the groove filled completely with the first and second insulating films.
Inventors
- 👤 Hiroshi Iwai
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 17:32
CPC Classifications
H; H10; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/014; H10W10/0148; H10W10/10; H10W10/17; Y; Y10; Y10S; Y10S438/00; Y10S438/978
Claims Analysis
Total Claims: 28
Claim 1
Independent Claim
157 words
A method of providing a deep element isolation region in a semiconductor device having a semiconductor substrate during manufacture of the device, comprising the steps of: (a) forming a pattern of a masking material on the semiconductor substrate, and forming a groove in said semiconductor substrate by using the patterned masking material as a mask; (b1) forming a first insulating film in said groove in such a degree as to leave V-shaped gaps on both sides of said first insulating film, each said gap being surrounded between a side wall of the groove and said first insulating film; (b2) removing said masking material together with said first insulating film formed thereon to leave said first insulating film only in said groove; (c) forming a second insulating film on the surface of said semiconductor substrate including said groove; and (d) forming an isolation region substantially in said groove by removing a surface layer of said second insulating film.
Claim 2
Independent Claim
157 words
A method of providing a deep element isolation region in a semiconductor device having a semiconductor substrate during manufacture of the device, comprising the steps of: (a) forming a pattern of a masking material on the semiconductor substrate, and forming a groove in said semiconductor substrate by using the patterned masking material as a mask; (b1) forming a first insulating film in said groove in such a degree as to leave V-shaped gaps on both sides of said first insulating film, each said gap being surrounded between a side wall of the groove and said first insulating film; (b2) removing said masking material together with said first insulating film formed thereon to leave said first insulating film only in said groove; (c) forming a second insulating film on the surface of said semiconductor substrate including said groove; and (d) forming an isolation region substantially in said groove by removing a surface layer of said second insulating film.
Claim 3
Dependent Claim
77 words
A method according to claim 1, wherein said first insulating film in step (b1) consists of a material having an oxidizing rate greater than an oxidizing rate of said semiconductor substrate; and oxidizing said first film after step (b2) and before step (c) under conditions that the oxidizing rate of said first film left in said groove is greater than the oxidizing rate of said semiconductor substrate so as to form an oxide of said first film.
Claim 4
Dependent Claim
27 words
A method according to claim 1, wherein said first insulating film formed in step (b1) is an Al 2 O 3 film or an SiO 2 film.
Claim 5
Dependent Claim
22 words
A method according to claim 1, wherein said second insulating film formed in step (c) consists of a low melting point insulator.
Claim 6
Dependent Claim
37 words
A method according to claim 4, wherein said semiconductor substrate is of n-type and said low melting point insulator is a member selected from the group consisting of boron phospho-silicate glass, phospho-silicate glass, and arsenic silicate glass.
Claim 7
Dependent Claim
17 words
A method according to claim 1, wherein said masking material in step (a) comprises a bi-layered structure.
Claim 8
Dependent Claim
39 words
A method according to claim 6, wherein said bi-layered structure consists of a SiO 2 film and a polycrystalline silicon film deposited on the SiO 2 film, and only the polycrystalline silicon film is removed in the step (b2).
Claim 9
Dependent Claim
32 words
A method according to claim 1, wherein said second insulating film is included with an impurity, and channel stopper regions are formed on both walls of the groove after the step (c).
Claim 10
Dependent Claim
22 words
A method according to claim 1, wherein the groove-forming step in the step (a) is carried out by a taper etching method.
Claim 11
Dependent Claim
32 words
A method according to claim 9, wherein an n- or p-type impurity is ion-implanted to form an n + - or p + -type layer before step (b1) and after step (a).
Claim 12
Dependent Claim
26 words
A method according to claim 1, wherein a thin insulating film is formed on a bottom of said groove before step (b1) and after step (a).
Claim 13
Dependent Claim
19 words
A method according to claim 1, wherein said first insulating film is a bi-layered structure consisting of two substances.
Claim 14
Dependent Claim
41 words
A method according to claim 1, wherein a conductor layer is formed on the upper surface of said semiconductor substrate after step (a), and said conductor layer on said masking layer is etched together with said masking material in step (b2).
Claim 15
Dependent Claim
26 words
A method according to claim 13, wherein said conductor layer consists of a material selected from the group consisting of refractory metals, silicides, and polycrystalline silicon.
Claim 16
Dependent Claim
45 words
A method according to claim 1, further comprising the steps of depositing a third insulating film containing an n- or p-type impurity before step (c) and after step (b2) and diffusing said impurity toward both sides of said groove in a heating step to follow.
Claim 17
Dependent Claim
32 words
A method according to claim 1, wherein an n- or p-type impurity is ion-implanted to form an n + - or p + -type layer before step (b1) and after step (a).
Claim 18
Dependent Claim
21 words
A method according to claim 16, wherein said n + - or p + -type layer is a channel stopper layer.
Claim 19
Dependent Claim
20 words
A method according to claim 16, wherein said n + - or p + -type layer is a wiring layer.
Claim 20
Independent Claim
164 words
A method of providing a deep element isolation region in a semiconductor device having a semiconductor substrate during manufacture of the device, comprising the steps of: forming a pattern of a masking material on the semiconductor substrate, and forming a groove in said semiconductor substrate by using the patterned masking material as a mask; forming a first insulating film in said groove in such a degree as to leave V-shaped gaps on both sides of said first insulating film, each said gap being surrounded between a side wall of the groove and the first insulating film; removing said masking material together with said first insulating film formed thereon to leave said first insulating film only in said groove; forming a second insulating film on the surface of said semiconductor substrate including said groove; forming a third insulating film over the second insulating film; and forming an isolation region substantially in said groove by removing a surface layer of said second and third insulating films.
Claim 21
Independent Claim
164 words
A method of providing a deep element isolation region in a semiconductor device having a semiconductor substrate during manufacture of the device, comprising the steps of: forming a pattern of a masking material on the semiconductor substrate, and forming a groove in said semiconductor substrate by using the patterned masking material as a mask; forming a first insulating film in said groove in such a degree as to leave V-shaped gaps on both sides of said first insulating film, each said gap being surrounded between a side wall of the groove and the first insulating film; removing said masking material together with said first insulating film formed thereon to leave said first insulating film only in said groove; forming a second insulating film on the surface of said semiconductor substrate including said groove; forming a third insulating film over the second insulating film; and forming an isolation region substantially in said groove by removing a surface layer of said second and third insulating films.
Claim 22
Independent Claim
38 words
A method according to any one of claims 1, 2 and 5 to 19, wherein said semiconductor substrate is of a bi-layered structure consisting of an n- or p-type silicon substrate and a monocrystalline semiconductor layer formed thereover.
Claim 23
Independent Claim
36 words
A method according to any one of claims 1, 2 and 5 to 19, wherein said semiconductor substrate is of a bi-layered structure consisting of a compound semiconductor substrate and a monocrystalline semiconductor layer formed thereover.
Claim 24
Independent Claim
24 words
A method according to any one of claims 1, 2 and 5 to 19, wherein said semiconductor substrate is formed on an insulating substrate.
Claim 25
Independent Claim
61 words
A method according to any one of claims 1, 2 and 5 to 19, wherein the step of forming said first insulating film is carried out in such a manner that the sides of said first insulating film are slanted, forming a gap between each of the side walls of said groove and the slanted side of said first insulating film.
Claim 26
Independent Claim
21 words
A method according to any one of claims 1, 2 and 5 to 19, wherein the semiconductor substrate is of n-type.
Claim 27
Independent Claim
21 words
A method according to any one of claims 1, 2 and 5 to 19, wherein the semiconductor substrate is of p-type.
Claim 28
Dependent Claim
36 words
A method according to claim 1, wherein the step (b2) comprises a step of etching said masking material together with said first insulating film formed thereon to leave said first insulating film only in said groove.
References Cited (Backward Citations)
US3352725A
Cited
GB1160744A
Cited
US3985597A
Cited
US3966514A
Cited
US4016017A
Cited
US4224089A
Cited
US4233091A
Cited
JPS5572053A
Cited
US4348802A
Cited
US4222792A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1986-12-12 | 1987-06-13 | 1987-12-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1990-12-12 | 1991-06-13 | 1991-12-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1994-12-12 | 1995-06-13 | 1995-12-13 | $7700.00 | Window Closed / Lapsed |