Bidirectional multi-mode data transfer bus system

Claim 1

A bus system for the transfer of data between a central station and at least two circuit modules, comprising: an interface circuit connected with said central station and containing: a microcomputer for controlling data transfer via said interface circuit; signal transfer lines; a coupler circuit; said coupler circuit containing: a coupler sub-circuit for selecting said signal transfer lines; a parallel-serial converter; a serial-parallel converter; said parallel-serial converter effecting the transfer of data between said microcomputer and said coupler circuit in a first direction of transfer; said serial-parallel converter effecting the transfer of data between said microcomputer and said coupler circuit in a second, opposed direction of transfer; a plurality of sub-units connected with said interface circuit; each of said plurality of sub-units containing: a respective switching stage; control means for controlling said switching stage for determining the direction of transfer of the data; said coupler circuit being connected via said signal transfer lines with respective ones of the switching stages provided for said sub-units; a control logic circuit operatively connected with said switching stage of the corresponding sub-unit; a bus connected with said circuit modules; each sub-unit containing: a status-word generator for generating signals indicating a mode of operation; and a first shift register for data signals; said switching stage controlling via the control logic circuit said status-word generator and said first shift register in such a manner that the data present at the switching stage is delivered via said first shift register to said bus connected with the circuit modules and in such manner that the data present at the circuit modules is delivered via said bus and the status word generator connected therewith to the switching stage; each sub-unit further containing: a second shift register for said signals indicating the mode of operation; and a third shift register for signals controlling the mode of operation; said second shift register being incorporated between one branch of the switching stage and an output of the status-word generator; and said third shift register being incorporated between another branch of the switching stage and the control logic circuit.