Error correcting code decoder

Claim 2

A coded signal decoder comprising: (a) first means for concatenating a cyclic block coded input signal, having a period of a predetermined codeword, with itself, (b) a first filter matched to a first predetermined code sequence of said signal connected to receive the concatenated signal, (c) a first peak position decoder connected to receive an output signal from the matched filter for providing an indication of the position of an autocorrelation peak corresponding to said code sequence relative to the input signal code, whereby the particular code is designated.

Claim 3

A decoder as defined in claim 1, in which the means for concatenating is comprised of a delay line, means for applying the input signal to the filter and the delay line simultaneously, whereby a coded input signal sequence having the same number of code elements as said code sequence is stored in the delay line, and means for applying only the signal retained in the delay line to the filter following application of said coded input signal sequence thereto.

Claim 4

A decoder as defined in claim 2, in which the delay line is a shift register having n bit positions corresponding to the number of bits in a codeword constituting said coded sequence.

Claim 5

A decoder as defined in claim 2 in which the delay line is an analog delay line and the matched filter is an analog matched filter.

Claim 6

A decoder as defined in claim 4 in which the delay line is a SAW device.

Claim 7

A decoder as defined in claim 4 in which the delay line is a charge coupled device.

Claim 8

A coded signal decoder as defined in claim 2, 3, or 4 in which an n bit code sequence is passed into the delay line at a rate of R hertz, means for passing the code sequence from the delay line into the matched filter at a rate of at least 2nR hertz, and for passing the output of the matched filter into the peak position decoder at the same rate of 2nR hertz.

Claim 9

A coded signal decoder as defined in claim 2 or 3 in which an n bit code sequence is clocked into the delay line at a rate of R hertz, means for clocking the code sequence from the delay line into the matched filter at a rate of at least 2nR hertz, and for clocking the output of the matched filter into the peak position decoder at the same rate of at least 2nR hertz.

Claim 10

A decoder as defined in claim 1, including (a) second means for concatenating said cyclic block coded input signal with itself, (b) a second filter matched to a second predetermined code sequence of said signal connected to receive the latter concatenated signal, (c) a second peak position decoder connected to receive an output signal from the second matched filter for providing an indication of the position of an autocorrelation peak corresponding to said second code sequence relative to the input signal code, (d) means for switching alternate sequences of code elements having the same number of code elements as said code sequence carried by said input signal sequentially to said first and second concatenating means, and (e) means for alternately switching the output signals of the first and second peak position decoders sequentially to an output terminal.

Claim 11

A decoder as defined in claim 9, in which the second means for concatenating is comprised of a second delay line, means for applying the input signal to the second filter and the second delay line simultaneously, whereby a coded input signal sequence having the same number of code elements as said code sequence is stored in the second delay line, and means for applying only the signal retained in the second delay line to the second filter following application of said coded input signal sequence thereto.

Claim 12

A decoder as defined in claim 10, in which the second delay line is a shift register having n bit positions corresponding to the number of bits in a codeword constituting said coded sequence.

Claim 13

A decoder as defined in claim 10 in which the second delay line is an analog delay line and the second matched filter is an analog matched filter.

Claim 14

A decoder as defined in claim 12 in which the second delay line is a SAW device.

Claim 15

A decoder as defined in claim 12 in which the second delay line is a charge coupled device.

Claim 16

A decoder as defined in claim 1, 2 or 9, in which the block coded input signal is comprised of a codeword of n bits made from suitably encoding k information bits, where the the number of codewords≦2 k .

Claim 19

A method of decoding a cyclic block code as defined in claim 16 comprising clocking the code sequence into the delay line at a rate of R hertz, and clocking the code sequence from the delay line into the matched filter at a rate of at least 2nR hertz, and for clocking the output of the matched filter into the peak position decoder at the same rate of at least 2nR hertz.

Claim 20

A decoder comprising: (a) means for providing a correlation signal representing a cyclic correlation of an input signal with a signal representing a predetermined codeword, (b) means for determining the position of an autocorrelation peak resulting from said correlation signal, and (c) means responsive to the position determining means for indicating the presence of said predetermined codeword upon said peak being in a predetermined position.

Claim 21

A decoder comprising: (a) means for providing a correlation signal representing a cyclic correlation of an input signal with a signal representing a predetermined codeword, (b) means for determining the position of an autocorrelation peak resulting from said correlation signal, and (c) means responsive to the position determining means for indicating the presence of said predetermined codeword upon said peak being in a predetermined position.

Claim 22

A decoder as defined in claim 18 in which the providing means is comprised of a matched filter, matched to said predetermined codeword, means for cyclically shifting n times an input signal code sequence having length n bits containing said code, n being a positive integer, and means for applying the shifted input signal to said filter, whereby said signal representing the cyclic correlation of the input signal is provided at the output of the filter.

Claim 23

A decoder as defined in claim 18 in which the input signal is a cyclic coded signal and the providing means is comprised of means for concatenating the cyclic coded input signal, having a period of a predetermined codeword, means for applying said concatenated signal to a first matched filter matched to a predetermined code sequence, whereby said signal representing the cyclic correlation of the input signal is provided at the output of the filter.

Claim 24

A decoder as defined in claim 18, 19 or 20 in which the indicating means is comprised of a memory containing at least one data code, and including means for addressing the location of the data code in said memory upon the autocorrelation peak being in said predetermined position.

Claim 25

A decoder as defined in claim 18, in which the providing means is comprised of means for generating a first signal representing either a real or complex Fourier transform of a time reversal of said codeword, means for generating a second signal representing a real or complex Fourier transform of the input signal, means for multiplying the first and second signals, means for generating said correlation signal by providing a required component of the inverse Fourier transform of the output of the multiplying means, for application to said peak position determining means.

Claim 26

A decoder as defined in claim 22, in which the indicating means is comprised of a memory containing at least one data code, and including means for addressing the location of the data code in said memory upon the autocorrelation peak being in said predetermined position.

Claim 27

A decoder for determining the synchronization of an input signal comprised of a correlatable cyclically shifted codeword once concatenated with itself followed by at least one information bearing codeword comprising: (a) means for providing a sample of the received input signal starting at or after the beginning of the concatenated code word sequence and ending before or at the end of the concatenated codeword sequence, the sample having the length of the codeword, (b) first correlating means for correlating the sample with a sample of the codeword to provide a correlation signal, (c) first means for determining the position of the autocorrelation peak, whereby the position of said peak relative to the end of the concatenated sequence indicates the time prior to the start of the information bearing codeword.

Claim 28

A decoder for determining the synchronization of an input signal comprised of a correlatable cyclically shifted codeword once concatenated with itself followed by at least one information bearing codeword comprising: (a) means for providing a sample of the received input signal starting at or after the beginning of the concatenated code word sequence and ending before or at the end of the concatenated codeword sequence, the sample having the length of the codeword, (b) first correlating means for correlating the sample with a sample of the codeword to provide a correlation signal, (c) first means for determining the position of the autocorrelation peak, whereby the position of said peak relative to the end of the concatenated sequence indicates the time prior to the start of the information bearing codeword.

Claim 29

A decoder for determining the synchronization of an input signal comprised of an m sequence code once concatenated with itself followed by at least one information bearing codeword comprising: (a) means for providing an m length sample of the received input signal starting at or after the beginning of the m sequence and ending before or at the end of the concatenated code, (b) first and second multipliers for multiplying the sample with first sine and cosine waveform signals respectively, the latter signals having the frequency of a carrier of the input signal, (c) first and second correlating means for providing correlation signals representing the cyclic correlation of output signals of the first and second multipliers respectively with a signal representing a predetermined codeword, (d) means for providing a signal representing the arctangent of the output signals of the first and second correlating means, whereby said latter signal representing the magnitude of the cyclic autocorrelation function is obtained at a peak position corresponding to the phase of the m sequence sample signal relative to the information bearing codeword.

Claim 30

A decoder for determining the synchronization of an input signal comprised of an m sequence code once concatenated with itself followed by at least one information bearing codeword comprising: (a) means for providing an m length sample of the received input signal starting at or after the beginning of the m sequence and ending before or at the end of the concatenated code, (b) first and second multipliers for multiplying the sample with first sine and cosine waveform signals respectively, the latter signals having the frequency of a carrier of the input signal, (c) first and second correlating means for providing correlation signals representing the cyclic correlation of output signals of the first and second multipliers respectively with a signal representing a predetermined codeword, (d) means for providing a signal representing the arctangent of the output signals of the first and second correlating means, whereby said latter signal representing the magnitude of the cyclic autocorrelation function is obtained at a peak position corresponding to the phase of the m sequence sample signal relative to the information bearing codeword.

Claim 31

A decoder as defined in claim 25, further including a third multiplier, means for applying the input signal to the multiplier, means for applying a sine waveform signal having the frequency of the first sine waveform signal and phase modified by said phase of the m sequence sample signal to the multiplier, means for applying the output signal of the third multiplier to a correlator for correlating the latter output signal with said codeword resulting in demodulation thereof.

Claim 32

A decoder as defined in claim 25 or 26 including peak position determining means comprised of first and second squaring means for providing signals representative of the square of the outputs of the correlators respectively, means for adding the outputs of the squaring means to provide a sum signal, and means for providing an output signal corresponding to the square root of the sum signal.

Claim 33

A decoder as defined in claim 25 or 26, in which each correlating means is comprised of a matched filter, matched to said m sequence code, means for cyclically shifting m times said input signal, and means for applying the shifted signal to the filter, whereby a signal representing the cyclic correlation of the m sequence code is provided at the output of the filter.

Claim 34

A decoder as defined in claim 25 or 26, in which each correlating means is comprised of a matched filter, matched to said m sequence code, means for cyclically shifting m times said input signal, and means for applying the shifted signal to the filter, whereby a signal representing the cyclic correlation of the m sequence code is provided at the output of the filter, and including peak position signal determining means comprised of first and second squaring means for providing signals representative of the square of the outputs of the correlators respectively, means for adding the outputs of the squaring means to provide a sum signal, and means for providing the peak position signal corresponding to the square root of the sum signal.

Claim 35

A decoder for determining the synchronization of an input signal comprised of a correlatable cyclically shifted codeword once concatenated with itself followed by at least one information bearing codeword comprising: (a) means for repeatedly providing a sample of the received input signal starting before the arrival of the concatenated codeword sequence and ending before or at the end of the concatenated codeword sequence, the sample having the length of the codeword, (b) first correlating means for repeatedly correlating the sample with a sample of the codeword to provide a correlation signal, (c) first means for determining the position of the autocorrelation peak, whereby the position of said peak relative to the end of the concatenated sequence indicates the time prior to the start of the information bearing codeword.

Claim 36

A decoder for determining the synchronization of an input signal comprised of a correlatable cyclically shifted codeword once concatenated with itself followed by at least one information bearing codeword comprising: (a) means for repeatedly providing a sample of the received input signal starting before the arrival of the concatenated codeword sequence and ending before or at the end of the concatenated codeword sequence, the sample having the length of the codeword, (b) first correlating means for repeatedly correlating the sample with a sample of the codeword to provide a correlation signal, (c) first means for determining the position of the autocorrelation peak, whereby the position of said peak relative to the end of the concatenated sequence indicates the time prior to the start of the information bearing codeword.

Claim 37

A decoder for determining the synchronization of an input signal comprised of an m sequence code once concatenated with itself followed by at least one information bearing codeword comprising: (a) means for repeatedly providing an m length sample of the received input signal starting before the arrival of the first m sequence codeword and ending before or at the end of the concatenated codeword, (b) first and second multipliers for multiplying the same with first sine and cosine waveform signals respectively, the latter signals having the frequency of a carrier of the input signal, (c) first and second correlating means for providing correlation signals representing the cyclic correlation of the output signals of the first and second multipliers respectively with a signal representing a predetermined codeword, (d) means for providing a signal representing the square of the output signals of the first and second correlating means, whereby said latter signal representing the magnitude of the cyclic autocorrelation function is obtained at a peak position corresponding to the phase of the m sequence sample signal relative to the information bearing codeword.

Claim 38

A decoder for determining the synchronization of an input signal comprised of an m sequence code once concatenated with itself followed by at least one information bearing codeword comprising: (a) means for repeatedly providing an m length sample of the received input signal starting before the arrival of the first m sequence codeword and ending before or at the end of the concatenated codeword, (b) first and second multipliers for multiplying the same with first sine and cosine waveform signals respectively, the latter signals having the frequency of a carrier of the input signal, (c) first and second correlating means for providing correlation signals representing the cyclic correlation of the output signals of the first and second multipliers respectively with a signal representing a predetermined codeword, (d) means for providing a signal representing the square of the output signals of the first and second correlating means, whereby said latter signal representing the magnitude of the cyclic autocorrelation function is obtained at a peak position corresponding to the phase of the m sequence sample signal relative to the information bearing codeword.

Claim 39

A decoder as defined in claim 24, in which the input signal is comprised of at least two received signals, each having autocorrelation peak having the same time prior to the start of the information bearing codeword, the codewords being cyclic shifts of each other such that the autocorrelation peaks of each appear where the autocorrelation function of the other is zero.

Claim 40

A decoder as defined in claim 24, 30 or 32, in which each input signal is a deBruijn sequence.

Claim 41

A decoder as defined in claim 32, in which received signals are received in groups of two, each group of two being received from a single transmitter, each signal of a group being a cyclic shift of the deBruijn sequence, one representing a data "1" and one representing a data "0".

Claim 42

A decoder as defined in claim 1, including (a) second means for concatenating a cyclic block coded input signal with itself, (b) a second filter matched to said predetermined code sequence of said signal, connected to receive the concatenated signal, (c) means for switching alternate sequences of code elements having the same number of code elements as said code sequence carried by the input signal sequentially to the first and second concatentating means, and (d) means for alternately switching the output signals of the first and second filters to said peak position decoder, from which an output signal is desired.

Claim 43

A decoder as defined in claim 24, 30 or 32, in which the codewords are m sequence codes.