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Apparatus for generation of binary pseudo-random numbers

Assignee: NEC Corp
•
Filing: 1982-05-24
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Granted: 1985-01-08
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Expires: 2002-05-24
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Abstract

Abstract Apparatus for generation of binary pseudo-random numbers of n bits by use of the maximum-length shift register sequence based on a primitive polynomial, f(x)=x p +x q +1, where p and q are positive integers satisfying the relation p>q≧1. The apparatus comprises p-bit storage means; (p-q) bit shift means for shifting the contents of said p-bit storage means; exclusive OR means for exclusive-ORing m (m≧n) bits resulting from the shifting and consecutive m bits stored in said storage means bit by bit; means for restoring exclusive-ORed results to uppermost bits of said storage means and uppermost (p-m) bits of said storage means to lowermost (p-m) bits thereof; and means for extracting uppermost n bits from said storage means.

Inventors

  • 👤 Tadashi Watanabe

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 18:03
CPC Classifications
H; H03; H03K; H03K3/00; H03K3/84; G; G06; G06F; G06F7/00; G06F7/58; G06F7/582; G06F7/584; G06F2207/00; G06F2207/58; G06F2207/581; G06F2207/583

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 133 words
Apparatus for generation of binary pseudo-random numbers of n bits by use of the maximum-length shift register sequence based on a primitive polynomial, f(x)=x p +x q +1, where p and q are positive integers satisfying the relation p>q≧1, said apparatus comprising: p-bit storage means; (p-q) bit shift means for shifting the lowermost (p-q+m) bits of said p-bit storage means; exclusive OR means for exclusive-ORing bit by bit the lowermost m (m≧n) bits of said p-bit storage means and m bits resulting from said shifting; and means for restoring the uppermost (p-m) bits of said p-bit storage means to the lowermost (p-m) bits of said p-bit storage means and exclusive-Ored results to the uppermost m bits of said p-bit storage means and for extracting the uppermost n bits of said p-bit storage means.
Claim 2
Dependent Claim 133 words
Apparatus for generation of binary pseudo-random numbers of n bits by use of the maximum-length shift register sequence based on a primitive polynomial, f(x)=x p +x q +1, where p and q are positive integers satisfying the relation p>q≧1, said apparatus comprising: p-bit storage means; (p-q) bit shift means for shifting the lowermost (p-q+m) bits of said p-bit storage means; exclusive OR means for exclusive-ORing bit by bit the lowermost m (m≧n) bits of said p-bit storage means and m bits resulting from said shifting; and means for restoring the uppermost (p-m) bits of said p-bit storage means to the lowermost (p-m) bits of said p-bit storage means and exclusive-Ored results to the uppermost m bits of said p-bit storage means and for extracting the uppermost n bits of said p-bit storage means.
Claim 3
Dependent Claim 144 words
Apparatus for generation of binary pseudo-random numbers of n bits by use of the maximum-length shift register sequence based on a primitive polynomial, f(x)=x p +x q +1, where p and q are positive integers satisfying the relation p>q≧1, said apparatus comprising: first p-bit storage means; (p-q) bit shift means for shifting the lowermost (p-q+m) bits of said first p-bit storage means; exclusive OR means for exclusive-ORing bit by bit the lowermost m (m≧n) bits of said first p-bit storage means and m bits resulting from said shifting; second p-bit storage means; and means for restoring the uppermost (p-m) bits of said first p-bit storage means to the lowermost (p-m) bits of said second p-bit storage means and exclusive-ORed m-bit results to the uppermost m bits of second p-bit storage means and for extracting the uppermost n bits of said second p-bit storage means.
Claim 4
Dependent Claim 144 words
Apparatus for generation of binary pseudo-random numbers of n bits by use of the maximum-length shift register sequence based on a primitive polynomial, f(x)=x p +x q +1, where p and q are positive integers satisfying the relation p>q≧1, said apparatus comprising: first p-bit storage means; (p-q) bit shift means for shifting the lowermost (p-q+m) bits of said first p-bit storage means; exclusive OR means for exclusive-ORing bit by bit the lowermost m (m≧n) bits of said first p-bit storage means and m bits resulting from said shifting; second p-bit storage means; and means for restoring the uppermost (p-m) bits of said first p-bit storage means to the lowermost (p-m) bits of said second p-bit storage means and exclusive-ORed m-bit results to the uppermost m bits of second p-bit storage means and for extracting the uppermost n bits of said second p-bit storage means.

References Cited (Backward Citations)

US3984668A Cited
US4213101A Cited
US4047008A Cited
US4325129A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1988-01-08 1988-07-09 1989-01-08 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1992-01-08 1992-07-09 1993-01-08 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1996-01-08 1996-07-09 1997-01-08 $7700.00 Window Closed / Lapsed

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