Device for displaying characters and graphs in superposed relation

Claim 2

A display device comprising: display memories for storing character codes and graphic images corresponding to characters and graphs to be displayed in superposed relation on a screen of a raster-scan type cathode ray tube; first and second parallel-to-serial converters for reading out plural-bit parallel graphic data and plural-bit parallel character data from said display memories in synchronism with a raster-scan timing of said tube in order to output graphic serial data and character serial data respectively; logic means for logically combining the output graphic serial data and character serial data to produce a video signal to be applied to said cathode ray tube; a fixed oscillator for generating and applying a first parallel-to-serial conversion control clock signal to said first parallel-to-serial converter; a PLL circuit for generating and applying a second parallel-to-serial conversion control clock signal to said second parallel-to-serial converter; means for generating first and second data load signals to cause respective data read-out operations of said first and second converters and for synchronizing said PLL circuit by comparing generated first and second data load signals to selectively produce any of a plurality of numbers of displayed character dots which may be different from a number of displayed graphic dots, whereby the character font of displayed characters can be freely changed irrespective to graphic dots.

Claim 3

A display device comprising: display memories for storing character codes and graphic images corresponding to characters and graphs to be displayed in superposed relation on a screen of a raster-scan type cathode ray tube; first and second parallel-to-serial converters for reading out plural-bit parallel graphic data and plural-bit parallel character data from said display memories in synchronism with a raster-scan timing of said tube in order to output graphic serial data and character serial data respectively; logic means for logically combining the output graphic serial data and character serial data to produce a video signal to be applied to said cathode ray tube; a PLL circuit for generating and applying a first parallel-to-serial conversion control clock signal to said first parallel-to-serial converter; a fixed oscillator for generating and applying a second parallel-to-serial conversion control clock signal to said second parallel-to-serial converter; means for generating first and second data load signals to cause respective data read-out operations of said first and second converters and for synchronizing said PLL circuit by comparing generated first and second data load signals to selectively produce any of a plurality of numbers of displayed graphic dots which may be different from a number of displayed character dots, whereby the graphic font of displayed graph images can be freely changed irrespective of character dots.

Claim 4

A display device comprising: display memories for storing character codes and graphic images corresponding to characters and graphs to be displayed in superposed relation on a screen of a raster-scan type cathode ray tube; first and second parallel-to-serial converters for reading out plural-bit parallel graphic data and plural-bit parallel character data from said display memories in synchronism with a raster-scan timing of said tube in order to output graphic serial data and character serial data respectively; logic means for logically combining the output graphic serial data and character serial data to produce a video signal to be applied to said cathode ray tube; a PLL circuit for generating and applying a first parallel-to-serial conversion control clock signal to said first parallel-to-serial converter; a fixed oscillator for generating and applying a second parallel-to-serial conversion control clock signal to said second parallel-to-serial converter; means for generating first and second data load signals to cause respective data read-out operations of said first and second converters and for synchronizing said PLL circuit by comparing generated first and second data load signals to selectively produce any of a plurality of numbers of displayed graphic dots which may be different from a number of displayed character dots, whereby the graphic font of displayed graph images can be freely changed irrespective of character dots.