US4489369A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Control circuit for a flyback stepcharger
Assignee: United States Department of the Navy
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Filing: 1983-06-28
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Granted: 1984-12-18
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Expires: 2003-06-28
Abstract
Abstract A control circuit for a flyback stepcharger comprising a source producing aurrent proportional to a power supply output in order to charge a capacitor. When the capacitor reaches a predetermined level the charging stops and switching transistors to the primary of the transformer of the stepcharger are turned on. When the primary current reaches another predetermined level the switching transistors are turned off. The source charging the capacitor is restarted a set time after the switching transistors are turned on. The stepcharging is terminated when the DC voltage of the power supply output reaches its set value as measured when the switching transistors are on.
Inventors
- 👤 Howard S. Ginsberg
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 07:16
CPC Classifications
H; H02; H02M; H02M3/00; H02M3/22; H02M3/24; H02M3/28; H02M3/325; H02M3/335; H02M3/33507; H02M3/33569
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
148 words
A control circuit for a power supply, comprising: a transformer having a primary and a secondary, said secondary powering a load connected across the secondary; a switching transistor for powering the primary of said transformer; a timing circuit for producing a delay after receiving an initialization signal, said timing circit varying said delay inversely as the electrical signal across said load, said timing circuit receiving a reinitializing signal a set time after the end of said delay; an enabling circuit for enabling on said switching transistor after said delay; a first disabling circuit for disabling said switching transistor when the current on the primary reaches a predetermined primary limit; a second disabling circuit for disabling said switching transistor when the electrical signal across said load exceeds a predetermined load limit after said switching transistor has been enabled by the enabling circuit and disabled by the first disabling circuit.
Claim 2
Dependent Claim
148 words
A control circuit for a power supply, comprising: a transformer having a primary and a secondary, said secondary powering a load connected across the secondary; a switching transistor for powering the primary of said transformer; a timing circuit for producing a delay after receiving an initialization signal, said timing circit varying said delay inversely as the electrical signal across said load, said timing circuit receiving a reinitializing signal a set time after the end of said delay; an enabling circuit for enabling on said switching transistor after said delay; a first disabling circuit for disabling said switching transistor when the current on the primary reaches a predetermined primary limit; a second disabling circuit for disabling said switching transistor when the electrical signal across said load exceeds a predetermined load limit after said switching transistor has been enabled by the enabling circuit and disabled by the first disabling circuit.
Claim 3
Dependent Claim
67 words
A control circuit for a power supply, as recited in claim 1 wherein: said electrical signal across said load is a load voltage; and said timing circuit comprises: a current source producing a current substantially proportional to said load voltage; a capacitor being charged by said current source; and comparison means for generating a signal when the voltage on said capacitor reaches a predetermined capacitor voltage limit.
Claim 4
Dependent Claim
37 words
A control circuit for a power supply, as recited in claim 2, wherein said first disabling circuit includes means for decreasing the predetermined primary limit as the electrical signal across said load approaches said predetermined load limit.
Claim 5
Dependent Claim
37 words
A control circuit for a power supply, as recited in claim 1, wherein said first disabling circuit includes means for decreasing the predetermined primary limit as the electrical signal across said load approaches said predetermined load limit.
Claim 6
Dependent Claim
182 words
A control circuit for a power supply, comprising: a transformer having a primary and a secondary, said secondary powering a capacitive load connected across the secondary; a switching transistor for powering the primary of said transformer; a capacitor for timing; a current source for charging said timing capacitor by means of a current proportional to the output of the power supply; comparison means for comparing the voltage across said capacitor to a timing limiting voltage and discontinuing the charging of the timing capacitor for a set time period when the voltage reaches the timing limiting voltage; first means for enabling the switching transistor when the voltage on the timing capacitor reaches the timing limit voltage and for disabling the switching transistor when the current in the primary reaches a primary limiting current; second means for disabling the switching transistor when the voltage on the power supply output reaches an output limiting voltage that is measured between the enabling point when the timing capacitor reaches the timing limiting voltage and disabling point when the current in the primary reaches the primary limiting current.
Claim 7
Dependent Claim
182 words
A control circuit for a power supply, comprising: a transformer having a primary and a secondary, said secondary powering a capacitive load connected across the secondary; a switching transistor for powering the primary of said transformer; a capacitor for timing; a current source for charging said timing capacitor by means of a current proportional to the output of the power supply; comparison means for comparing the voltage across said capacitor to a timing limiting voltage and discontinuing the charging of the timing capacitor for a set time period when the voltage reaches the timing limiting voltage; first means for enabling the switching transistor when the voltage on the timing capacitor reaches the timing limit voltage and for disabling the switching transistor when the current in the primary reaches a primary limiting current; second means for disabling the switching transistor when the voltage on the power supply output reaches an output limiting voltage that is measured between the enabling point when the timing capacitor reaches the timing limiting voltage and disabling point when the current in the primary reaches the primary limiting current.
Claim 8
Dependent Claim
47 words
A control circuit for a power supply, as recited in claim 5, wherein the second disabling means includes means for decreasing the primary limiting current when the voltage on the power supply output exceeds a fine tuning limiting voltage that is less than the output limiting voltage.
Claim 9
Independent Claim
99 words
A method of controlling a stepcharger comprising: receiving an initialization signal; enabling a switching transistor powering a primary of a transformer of the stepcharger after a delay following the initialization signal, said delay being for a time inversely related to the voltage on an output of the stepcharger; disabling the switching transistor when the current in the primary reaches a primary limiting current; measuring the voltage on the output of the stepcharger, between the time of emabling and disabling; and further disabling the switching transistor if the measured voltage exceeds an output limiting voltage; and generating another initialization signal.
Claim 10
Independent Claim
99 words
A method of controlling a stepcharger comprising: receiving an initialization signal; enabling a switching transistor powering a primary of a transformer of the stepcharger after a delay following the initialization signal, said delay being for a time inversely related to the voltage on an output of the stepcharger; disabling the switching transistor when the current in the primary reaches a primary limiting current; measuring the voltage on the output of the stepcharger, between the time of emabling and disabling; and further disabling the switching transistor if the measured voltage exceeds an output limiting voltage; and generating another initialization signal.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1987-12-18 | 1988-06-18 | 1988-12-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1991-12-18 | 1992-06-18 | 1992-12-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1995-12-18 | 1996-06-18 | 1996-12-18 | $7700.00 | Window Closed / Lapsed |