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US4484210A Expired / Lapsed US ⏱️ 0.0 years remaining

Solid-state imaging device having a reduced image lag

Assignee: NEC Corp
•
Filing: 1981-08-31
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Granted: 1984-11-20
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Expires: 2001-08-31
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Abstract

Abstract A solid-state imaging device has a semiconductor substrate of one conductive type. A plurality of light-charge converter regions, of the opposite conductivity type, are formed in the semiconductor substrate. A charge-voltage converter region, formed in the semiconductor substrate, converts the electric charge produced by the light-charge converter regions into a voltage. At least one charge transfer section is formed in the semiconductor substrate for transferring the electric charge produced by the light-charge converter regions to the charge-voltage converter region. At least one charge transfer gate section is in the semiconductor substrate and has a gate electrode for controlling the timing of a transfer of the electric charges from the light-charge converter regions to the charge transfer section. Pulses are generated with a predetermined pulse potential and applied to the gate electrode in the charge transfer gate section. The predetermined pulse potential has the relationship V.sub.B +2φ.sub.FP <V.sub.TG sub where; V B represents a voltage which completely depletes the light-charge converter region; φ FP represents a difference between a Fermi level of the semiconductor substrate not containing an impurity; and V TG sub represents a potential generated at the semiconductor substrate in the charge transfer gate section by the mentioned pulse.

Inventors

  • 👤 Hiromitsu Shiraki
  • 👤 Nobukazu Teranishi
  • 👤 Yasuo Ishihara

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 02:58
CPC Classifications
H; H10; H10F; H10F39/00; H10F39/10; H10F39/12; H10F39/15; H10F39/153

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 161 words
The solid-state imaging device comprising a semiconductor substrate of one conductivity type having an impurity concentration in the order of 1 to 10×10 14 cm -3 , a plurality of light-charge converter regions of the other conductivity type having an impurity concentration of 10 15 to 10 18 cm -3 , said light-charge converter regions being arrayed in a matrix form of rows and columns, a plurality of surface regions of said one conductivity type having an impurity concentration which is higher than the impurity concentration of said light-charge converter regions, said surface regions being disposed at the surface of said light-charge converter regions, charge transfer gate sections disposed parallel to columns of said light-charge converter regions, CCD charge transfer sections disposed parallel to said charge transfer gate sections, shift register means for receiving charges from said CCD charge transfer sections, and charge-voltage converter means for deriving a voltage signal in response to quantities of charges transferred along said shift register.
Claim 2
Dependent Claim 161 words
The solid-state imaging device comprising a semiconductor substrate of one conductivity type having an impurity concentration in the order of 1 to 10×10 14 cm -3 , a plurality of light-charge converter regions of the other conductivity type having an impurity concentration of 10 15 to 10 18 cm -3 , said light-charge converter regions being arrayed in a matrix form of rows and columns, a plurality of surface regions of said one conductivity type having an impurity concentration which is higher than the impurity concentration of said light-charge converter regions, said surface regions being disposed at the surface of said light-charge converter regions, charge transfer gate sections disposed parallel to columns of said light-charge converter regions, CCD charge transfer sections disposed parallel to said charge transfer gate sections, shift register means for receiving charges from said CCD charge transfer sections, and charge-voltage converter means for deriving a voltage signal in response to quantities of charges transferred along said shift register.

References Cited (Backward Citations)

US3995302A Cited
US4155094A Cited
US4385307A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1987-11-20 1988-05-21 1988-11-20 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1991-11-20 1992-05-21 1992-11-20 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1995-11-20 1996-05-21 1996-11-20 $7700.00 Window Closed / Lapsed

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