Superheterodyne circuit having variable bandwidth and center frequency shift function

Claim 1

A superheterodyne circuit comprising: a first mixer converting a received signal into a first intermediate frequency; a second mixer converting the first intermediate frequency into a second intermediate frequency; a first intermediate frequency filter connected between said first and second mixers; a product detector having a BFO input for demodulating the second intermediate frequency to an audio frequency; and a second intermediate frequency filter connected between said second mixer and said product detector, wherein a VCO supplies a local oscillation frequency to the first mixer, while the oscillation frequency of the VCO is determined by a PLL circuit, wherein the VCO is responsive to a control voltage generated by a phase comparator responsive to a reference frequency input and said supplied local oscillation frequency which is processed by a third mixer and a programmable frequency divider in cascade, a first oscillator coupled to said phase comparator to supply said reference frequency, wherein a local oscillation frequency for the second mixer is an output obtained by mixing the frequency of an adjustable frequency second oscillator with that of an adjustable frequency third oscillator in a fourth mixer; a fifth mixer responsive to a frequency of the third oscillator and a frequency related to the frequency of the first oscillator; a sixth mixer responsive to said second oscillator and a variable frequency oscillator for providing a respective output signal; a seventh mixer for mixing said respective output signal with a frequency related to the frequency of the first oscillator to provide an input signal to said third mixer of the PLL circuit; the total effective intermediate frequency bandwidth of said first and second intermediate frequency filter and an effective intermediate frequency filter center frequency position being variable for a reception band determined by the relationship between a frequency-division ratio of the programmable frequency divider of the PLL circuit and a first oscillator related frequency input to the seventh mixer, the bandwidth and center frequency position being varied by initially tuning a received frequency determined by the frequency of the VFO, and, for bandwidth variation subsequently varying the frequency of the second or third oscillator or simultaneously varying the frequencies of the second and third oscillators in a first relationship, and, for center frequency position variation, subsequently, simultaneously varying the frequencies of the second and third oscillators in a second relationship.