Speed control apparatus for DC motor

Claim 2

A speed control apparatus for a DC motor comprising: a bridge circuit to be completed by including as one arm, a first series circuit comprising a first resistance and said DC motor, the counter electromotive force of which is proportional to the revolutional speed of said DC motor, and as the other arm, a second series circuit comprising a second resistance and a third resistance, detection terminals comprising a first connection point of said DC motor and said first resistance, and a second connection point of said second resistance and said third resistance, for producing a voltage proportional to the counter electromotive force of said DC motor, a differential amplifier for amplifying signal of difference between a reference voltage and said produced voltage of said detection terminals, a current control means for controlling a current supplied to said bridge circuit by controlling a current control transistor inserted between a feeding terminal of said bridge circuit and a positive end of a power source, utilizing an output of said differential amplifier, a first transistor being connected by its emitter to said positive end of said power source and by its collector to a constant current circuit, a second transistor being connected by its emitter to said positive end of said power source and by its collector to a constant voltage circuit which produces said reference voltage, a third transistor being connected by its emitter to said positive end of said power source and by its collector to said differential amplifier, and said second and third transistors constituting current mirror transistors with respect to said first transistor.

Claim 3

A speed control apparatus for a DC motor in accordance with claim 1 wherein said differential amplifier comprises fourth and fifth transistors and further comprising sixth and seventh transistors which are connected by their collectors to said fourth and fifth differential amplifier transistors respectively, the emitters of said sixth and seventh transistors being connected to a negative terminal of a power source, said sixth transistor being connected by its base both to the collector of said sixth transistor and to the base of said seventh transistor.

Claim 4

A speed control apparatus for a DC motor in accordance with claim 2, further comprising: a fourth resistance inserted between the emitter of said sixth transistor and the negative end of said power source, a fifth resistance inserted between the emitter of said seventh transistor and the negative end of the said power source, the values of said fourth resistance and the fifth resistance being different from each other.

Claim 5

A speed control circuit for a DC motor, comprising: first, second, and third resistances, adapted to be connected with said DC motor in a bridge configuration having first, second, third, and fourth junctures, said first resistance being connected to one side of said motor at said first juncture, and to one side of said third resistance at said fourth juncture, said second resistance being connected to the other side of said motor at said third juncture, and to the other side of said third resistance at said second juncture, the voltage between said first and second junctures being proportional to the counter electromotive force of said DC motor; means, including a constant voltage circuit, for generating a reference voltage indicative of a desired motor speed; a differential amplifier, responsive to said reference voltage and said signal proportional to counter electromotive force, for generating a difference signal; current control means, for controllably supplying current to said bridge configuration, said current control means including a current control transistor, responsive to said difference signal, for controllably effecting a current path between a positive potential and said bridge third juncture; said bridge fourth juncture being connected to ground potential; a constant current source; a current mirror circuit, comprising first, second, and third transistors, each having emitter, collector, and base, the base of each of said first, second, and third transistor being connected to the collector of said first transistor, the emitter of each of said first, second, and third transistors being connected to said positive potential, and the collectors of said first, second, and third transistors being connected to said constant current source, said constant voltage circuit, and said differential amplifier, respectively.

Claim 6

A speed control circuit for a DC motor, comprising: first, second, and third resistances, adapted to be connected with said DC motor in a bridge configuration having first, second, third, and fourth junctures, said first resistance being connected to one side of said motor at said first juncture, and to one side of said third resistance at said fourth juncture, said second resistance being connected to the other side of said motor at said third juncture, and to the other side of said third resistance at said second juncture, the voltage between said first and second junctures being proportional to the counter electromotive force of said DC motor; means, including a constant voltage circuit, for generating a reference voltage indicative of a desired motor speed; a differential amplifier, responsive to said reference voltage and said signal proportional to counter electromotive force, for generating a difference signal; current control means, for controllably supplying current to said bridge configuration, said current control means including a current control transistor, responsive to said difference signal, for controllably effecting a current path between a positive potential and said bridge third juncture; said bridge fourth juncture being connected to ground potential; a constant current source; a current mirror circuit, comprising first, second, and third transistors, each having emitter, collector, and base, the base of each of said first, second, and third transistor being connected to the collector of said first transistor, the emitter of each of said first, second, and third transistors being connected to said positive potential, and the collectors of said first, second, and third transistors being connected to said constant current source, said constant voltage circuit, and said differential amplifier, respectively.

Claim 7

The circuit of claim 4, wherein said differential amplifier comprises fourth and fifth transistors, each having emitter, collector, and base, the emitters of said fourth and fifth transistors each being connected to the collector of said third transistor, the base of said fourth transistor being connected to said means for generating a reference voltage, and the base of said fifth transistor being connected to said bridge second juncture; said circuit further comprising sixth and seventh transistors each having emitter, collector, and base, the collectors of said sixth and seventh transistors being connected to the collectors of said fourth and fifth transistors, respectively, the bases of said sixth and seventh transistors being connected in common, and the collector of said sixth transistor being further connected to the bases of said sixth and seventh transistors, the emitters of said sixth and seventh transistors being connected to ground potential.

Claim 8

The circuit of claim 4, wherein said differential amplifier comprises fourth and fifth transistors, each having emitter, collector, and base, the emitters of said fourth and fifth transistors each being connected to the collector of said third transistor, the base of said fourth transistor being connected to said means for generating a reference voltage, and, the base of said fifth transistor being connected to said bridge second juncture; said circuit further comprising sixth and seventh transistors each having emitter, collector and base, the collectors of said sixth and seventh transistors being connected to the collectors of said fourth and fifth transistors, respectively, the bases of said sixth and seventh transistors being connected in common, and the collector of said sixth transistor being further connected to the bases of said sixth and seventh transistors, the emitters of said sixth and seventh transistors being coupled to ground potential through fourth and fifth resistances, respectively, said fourth and fifth resistances being of different value.