Patent US4471312A successfully refreshed from Google Patents.
US4471312A
Expired / Lapsed
US
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Integrated circuit demodulator for FSK signals
Assignee: Texas Instruments Inc
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Filing: 1981-06-02
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Granted: 1984-09-11
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Expires: 2001-06-02
Abstract
Abstract An integrated circuit demodulator receives an alternating signal at a first frequency and an alternating signal at a second frequency and provides a binary output corresponding to the first and second frequencies. An input signal is received by a first and a second frequency filter. If the input signal is the first frequency, then it is attenuated in the second frequency filter and vice versa. A positive full wave rectifier receives the first frequency signal and provides a positive full wave rectification thereof. A negative full wave rectifier receives the second frequency signal and provides a negative full wave rectification thereof. The rectifications are summed in an operational amplifier, thereby providing a difference so that the positive rectification is reduced by the attenuated negative rectification and the negative rectification is reduced by the attenuated positive rectification. A binary output is thereby provided.
Inventors
- 👤 William A. Severin
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 14:20
CPC Classifications
H; H04; H04L; H04L27/00; H04L27/10
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
308 words
An integrated circuit demodulator for receiving an input alternating signal at a first frequency or a second frequency and providing a binary output corresponding to the first and second frequencies, comprising: (a) a first frequency filter for receiving the input alternating signal at the first or second frequencies, for attenuating the second frequency or passing the first frequency, the output of the first frequency filter being a first frequency signal; (b) a second frequency filter for receiving the input alternating signal at the first or second frequencies, for attenuating the first frequency or passing the second frequency, the output of the second frequency filter being a second frequency signal; (c) a positive full wave rectifier for receiving the first frequency signal and for providing a positive full wave rectification thereof comprising: (i) reference crossing detect means for detecting when the first frequency signal crosses a predetermined reference in a positive direction, and for providing a first output signal in response thereto; (ii) first output signal storing means, for storing the first output signal; (iii) first frequency signal storing means, for storing the first frequency signal; and (iv) inverting and non-inverting transfer circuitry, connected to the first output signal storing means, and to the first frequency signal storing means for inverting and transferring the contents of the first frequency signal storing means in the presence of the first output signal stored in the first output signal storing means, and for transferring, without inverting, the contents of the first frequency signal storing means in the absence of the first output signal stored in the first output signal storing means; (d) a negative full wave rectifier for receiving the second frequency signal and for providing a negative full wave rectification thereof; and (e) a summing operational amplifier for summing the positive and negative full wave rectifications to provide the binary output.
Claim 2
Dependent Claim
308 words
An integrated circuit demodulator for receiving an input alternating signal at a first frequency or a second frequency and providing a binary output corresponding to the first and second frequencies, comprising: (a) a first frequency filter for receiving the input alternating signal at the first or second frequencies, for attenuating the second frequency or passing the first frequency, the output of the first frequency filter being a first frequency signal; (b) a second frequency filter for receiving the input alternating signal at the first or second frequencies, for attenuating the first frequency or passing the second frequency, the output of the second frequency filter being a second frequency signal; (c) a positive full wave rectifier for receiving the first frequency signal and for providing a positive full wave rectification thereof comprising: (i) reference crossing detect means for detecting when the first frequency signal crosses a predetermined reference in a positive direction, and for providing a first output signal in response thereto; (ii) first output signal storing means, for storing the first output signal; (iii) first frequency signal storing means, for storing the first frequency signal; and (iv) inverting and non-inverting transfer circuitry, connected to the first output signal storing means, and to the first frequency signal storing means for inverting and transferring the contents of the first frequency signal storing means in the presence of the first output signal stored in the first output signal storing means, and for transferring, without inverting, the contents of the first frequency signal storing means in the absence of the first output signal stored in the first output signal storing means; (d) a negative full wave rectifier for receiving the second frequency signal and for providing a negative full wave rectification thereof; and (e) a summing operational amplifier for summing the positive and negative full wave rectifications to provide the binary output.
Claim 3
Dependent Claim
163 words
The circuit of claim 1 wherein the negative full wave rectifier comprises: (b) (i) reference crossing detect means for detecting when the second frequency signal crosses a predetermined reference in a negative direction, and for providing a second output signal in response thereto; (ii) second output signal storing means for storing the second output signal; (iii) second frequency storing means for storing the second frequency signal; and (iv) inverting and non-inverting transfer circuitry, connected to the second output signal storing means, to the second frequency signal storing means and to the summing operational amplifier, for inverting and transferring the contents of the second frequency signal storing means to the summing operational amplifier in the presence of the second output signal stored in the second output signal storing means, and for transferring, without inverting, the contents of the second frequency signal storing means to the summing operational amplifier in the absence of the second output signal stored in the second output signal storing means.
Claim 4
Dependent Claim
25 words
The circuit of claim 2 wherein the first and second output signal storing means and the first and second frequency signal storing means comprise capacitors.
Claim 5
Dependent Claim
19 words
The circuit of claim 1 further comprising a smoothing filter connected to the output of the summing operational amplifier.
Claim 6
Dependent Claim
13 words
The circuit of claim 2 wherein the integrated circuit comprises field effect transistors.
References Cited (Backward Citations)
US3683278A
Cited
US3947769A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1987-09-11 | 1988-03-12 | 1988-09-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1991-09-11 | 1992-03-12 | 1992-09-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1995-09-11 | 1996-03-12 | 1996-09-11 | $7700.00 | Window Closed / Lapsed |