Current mirror circuit

Claim 2

A current mirror circuit comprising: a power supply source, a series circuit of a current source and the collector-emitter path of a first transistor, said series circuit being connected between said power supply source and a reference voltage source, and a second transistor circuit having a control electrode connected with the base of said first transistor and a main current path connected between the base of said first transistor and said reference voltage source, characterized by: a third transistor circuit having a control electrode connected with the collector of said first transistor and a main current path one terminal of which is connected with the base of said first transistor; and a fourth transistor circuit having a control electrode connected with the base of said first transistor and a main current path one terminal of which is connected with said reference voltage source, in which the other terminal of said main current path of said fourth transistor is connected with said power supply source, in which said third transistor circuit consists of a plurality of transistors which have their control electrodes and one of their main current path electrodes respectively connected together and a plurality of output terminals connected respectively to the other main current path electrodes, and in which the current proportion among said first transistor, said second transistor and said fourth transistor is 1:n:n 2 -1 and the sum of output currents obtained from said output terminals in n times as great as the input current obtained from said current source.

Claim 3

A current mirror circuit according to claim 1, in which said current proportion is defined by the proportion of emitter areas among said first transistor, said second and said fourth transistor circuit.

Claim 4

A current mirror circuit according to claim 2, in which an output current of each of said parallel connected plurality of transistors is of desired value by forming the proportion of emitter areas among said parallel connected plurality of transistors as desired, respectively.

Claim 5

A current mirror circuit according to claim 2, including a first emitter resistor connected between the emitter of said first transistor and said reference voltage source, a second emitter resistor connected between the emitter of said second transistor circuit and said reference voltage source and a third emitter resistor connected between the emitter of said fourth transistor circuit and said reference voltage source.

Claim 6

A current mirror circuit according to claim 1, in which said current proportion is defined by the numbers of transistors of said second and said fourth transistor circuits.

Claim 7

A current mirror circuit according to claim 5, in which an output current of each of said parallel connected plurality of transistors is of desired value by forming the proportion of emitter areas of said parallel connected plurality of transistors as desired, respectively.

Claim 8

A current mirror circuit according to claim 5, in which an output current of each of said parallel connected plurality of transistors is of desired value by connecting emitter resistors having desired values with the emitters of said parallel connected plurality of transistors, respectively.

Claim 9

A current mirror circuit according to claim 1, in which said second and said fourth transistor circuits consist of a second and a fourth transistors, respectively and resistors are connected with emitters of said first, said second and said fourth transistors, respectively, to define said current proportion among said first, said second and said fourth transistors.

Claim 10

A current mirror circuit according to claim 8, in which an output current of each of said parallel connected plurality of transistors is of desired value by forming the proportion of emitter areas of said parallel connected plurality of transistors as desired, respectively.

Claim 11

A current mirror circuit according to claim 8, in which an output current of each of said parallel connected plurality of transistors is of desired value by connecting emitter resistors having desired values with the emitters of said parallel connected plurality of transistors, respectively.

Claim 12

A current mirror circuit according to claim 1, in which an output current of each of said parallel connected plurality of transistors is of desired value by forming the proportion of emitter areas among said parallel connected plurality of transistors as desired, respectively.

Claim 13

A current mirror circuit according to claim 1, in which an output current of each of said parallel connected plurality of transistors is of desired value by connecting emitter resistors having desired values with the emitters of said parallel connected plurality of transistors, respectively.

Claim 14

A current mirror circuit comprising, a power supply source, a series circuit of a current source and the collector-emitter path of a first transistor, said series circuit being connected between said power supply source and a reference voltage source; and a second transistor Q 2 having a control electrode connected with the base of said first transistor and a main current path connected between the base of said first transistor and said reference voltage source, characterized by: a third transistor Q 3 having a control electrode connected with the collector of said first transistor and a main current path one terminal of which is connected with the base of said first transistor, a fourth transistor Q 4 having a control electrode connected with the base of said first transistor and a main current path one terminal of which is connected with said reference voltage source, in which the other terminal of said main current path of said third transistor is connected to an output terminal and the other terminal of said main current path of said fourth transistor is connected to said output terminal, a fifth transistor with its control electrode connected to the collector of said first transistor, and its main current path with one terminal connected to the base of said first transistor and the other terminal connected to a second output terminal, a sixth transistor having a control electrode connected with the base of said first transistor and its main current path connected with one terminal to said reference voltage and the other terminal to said second output terminal.

Claim 15

A current mirror circuit comprising, a power supply source, a series circuit of a current source and the collector-emitter path of a first transistor, said series circuit being connected between said power supply source and a reference voltage source; and a second transistor Q 2 having a control electrode connected with the base of said first transistor and a main current path connected between the base of said first transistor and said reference voltage source, characterized by: a third transistor Q 3 having a control electrode connected with the collector of said first transistor and a main current path one terminal of which is connected with the base of said first transistor, a fourth transistor Q 4 having a control electrode connected with the base of said first transistor and a main current path one terminal of which is connected with said reference voltage source, in which the other terminal of said main current path of said third transistor is connected to an output terminal and the other terminal of said main current path of said fourth transistor is connected to said output terminal, a fifth transistor with its control electrode connected to the collector of said first transistor, and its main current path with one terminal connected to the base of said first transistor and the other terminal connected to a second output terminal, a sixth transistor having a control electrode connected with the base of said first transistor and its main current path connected with one terminal to said reference voltage and the other terminal to said second output terminal.

Claim 16

A current mirror circuit according to claim 13 including first, second, third and fourth emitter resistors connected to the emitters of said, first, second, fourth and sixth transistors.

Claim 17

A current mirror circuit according to claim 14 including fifth and sixth resistors connected to the emitters of said third and fifth transistors.