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US4463415A Expired / Lapsed US ⏱️ 0.0 years remaining

Timing generator for use with multi-phase control rectifier systems

Assignee: Magnetek Inc
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Filing: 1982-08-09
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Granted: 1984-07-31
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Expires: 2002-08-09
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Abstract

Abstract A timing generator for use with multi-phase controlled rectifier systems is disclosed in which a ramp signal is produced in phase synchronization with the power source and compared with the value of a command signal. The command signal is indicative of the desired SCR ignition angle. A sequencing circuit, having a finite number of output states is cyclically stepped from one state to the next by a comparator. The sequencing circuit couples a source of SCR-gating pulses to the appropriate SCR in accordance with its state and with a predetermined pattern of SCR ignitions which characterize the multi-phase source. One aspect of the invention provides the multiplexing of the comparator output whereby the command signal is offset by 60 DEG (electrical) after each comparator transition to set up conditions for the next transition. A further aspect of the invention provides for the generation of an alternate ramp, 180 DEG (electrical) out of phase with the foregoing ramp, and selectively applied to the comparator during periods in which the first ramp is discontinuous. The interrelationship of the 60 DEG interval associated with the command signal offset, and the 180 DEG relationship between the two ramps is advantageously utilized in the repeated offsetting of the command signal.

Inventors

  • 👤 Donald E. Vollrath

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 22:02
CPC Classifications
H; H02; H02M; H02M1/00; H02M1/08; H02M1/084; H02M1/0845; H02M7/00; H02M7/02; H02M7/04; H02M7/12; H02M7/145; H02M7/155; H02M7/1555; H02M7/1557

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 140 words
A method for selectively gating the appropriate semiconductor device in a multi-phase rectifier system of type including a plurality of selectively gateable semi-conductive devices coupled between a multi-phase power source and a D.C. load and arranged to couple D.C. voltage across the load comprising the steps of: (a) producing a first signal having unique values representative of respective power line phase angles; (b) producing a command signal indicative of the ignition phase angle at which gating is desired; (c) comparing the first signal and command signal; (d) sequencing a multi-state circuit having a plurality of sequentially occuring output states to the sequentially next state when the first command signals are substantially equal; and (e) coupling uniquely respective semi-conductive devices to a source of gating pulses in accordance with the output state and the ignition pattern associated with the multiphase source.
Claim 2
Independent Claim 140 words
A method for selectively gating the appropriate semiconductor device in a multi-phase rectifier system of type including a plurality of selectively gateable semi-conductive devices coupled between a multi-phase power source and a D.C. load and arranged to couple D.C. voltage across the load comprising the steps of: (a) producing a first signal having unique values representative of respective power line phase angles; (b) producing a command signal indicative of the ignition phase angle at which gating is desired; (c) comparing the first signal and command signal; (d) sequencing a multi-state circuit having a plurality of sequentially occuring output states to the sequentially next state when the first command signals are substantially equal; and (e) coupling uniquely respective semi-conductive devices to a source of gating pulses in accordance with the output state and the ignition pattern associated with the multiphase source.
Claim 3
Dependent Claim 25 words
The method of claim 1 including the steps of producing, as the first signal, a cyclical first ramp-like signal in phase-synchronization with the power source.
Claim 4
Dependent Claim 23 words
The method claim 2 including the step of compounding the magnitude of the command signal with the instantaneous magnitude of the ramp-like signal.
Claim 5
Dependent Claim 25 words
The method of claim 1 or 3 including the step of using a multi-state circuit which cyclically sequences through a finite number of output states.
Claim 6
Dependent Claim 51 words
The method of claim 2 or 3 including the additional steps of cyclically producing a second ramp-like signal which is offset in phase from the first ramp-like signal, and substituting the second ramp-like signal for the first ramp-like signal in the comparison step during periods of discontinuity in the latter signal.
Claim 7
Dependent Claim 45 words
The method of claim 5 including the steps of modifying the command signal in accordance with the magnitude of the second ramp-like signal at the ignition angle; and comparing the modified command signal with the second ramp-like signal during discontinuities in the first ramp-like signal.
Claim 8
Dependent Claim 62 words
The method of claim 6 wherein the modified command signal is compared with the second ramp-like signal during a cyclically occurring phase angle range which commences with the ignition of a selected semiconductive device which is not susceptible to gating during the discontinuity and which terminates upon the gating of the last semi-conductive device which is susceptible to gating during the discontinuity.
Claim 9
Dependent Claim 34 words
The method of claim 5 including the steps of producing as the first ramp-like signal a multibit digital signal, and producing the second ramp-like signal by modifying at least a portion of the bits.
Claim 10
Dependent Claim 15 words
The method of claim 8 including the step of modifying the three most significant bits.
Claim 11
Dependent Claim 91 words
The method of claim 9 including the step of modifying the three most significant bits according to B 8 =Q 8 B 9 =Q 9 ·(Q 8 ⊕Q 10 ) B 10 =Q 10 ·(Q 8 ⊕Q 9 ) where: Q 8 , Q 9 , Q 10 are respectively the 3rd, 2nd, and first MSB of the first ramp-like signal; B 8 , B 9 , B 10 are respectively the 3rd, 2nd, and first MSB of the second ramp-like signal; and Q means "not Q" ⊕ means "exclusive or".

References Cited (Backward Citations)

US3704408A Cited
DE2700872A1 Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1987-07-31 1988-01-30 1988-07-31 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1991-07-31 1992-01-30 1992-07-31 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1995-07-31 1996-01-30 1996-07-31 $7700.00 Window Closed / Lapsed

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