Controlled rectifier firing system with voltage compensation

Claim 2

A gate firing control system for six controlled rectifiers interconnecting an electrical load with a three-phase alternating current source providing three-phase voltages A, B, and C, comprising: a logic array providing six gate firing intervals synchronized respectively to afford controlled gating of an associated controlled rectifier; means for developing six equal amplitude sinusoids having the phases respectively of the sinusoids AB, BC, CA, BA, CB, and AC; means for developing an offset voltage, said offset voltage being an unfiltered threephase rectified voltage having a peak amplitude equal to the peak amplitude of said six equal amplitude sinusoids; means for combining said offset voltage with said six equal amplitude sinusoids to define six firing control ramps for use respectively in said six gate firing intervals; a reference control voltage; means for comparing said reference control voltage with said six firing control ramps to develop a control signal in each gate firing interval when the reference voltage and the associated firing control ramp have a predetermined relationship; and trigger means connected with said last named means for each controlled rectifier to initiate a gate firing signal on the occasion of each control signal in the gate firing intervals associated with the respective controlled rectifier and to maintain the gate firing signal for 120* at the frequency of operation.

Claim 3

A gate firing control system for six controlled rectifiers interconnecting an electrical load with a three-phase alternating current source providing three-phAse voltages A, B, and C, comprising: a logic array providing six 120* gate firing intervals synchronized respectively to afford controlled gating of an associated controlled rectifier; means for synthesizing a ramp voltage for each 120* gate firing interval, each of said ramp voltages comprising two sine wave portions joined in the centers of said 120* gate firing intervals, each of said ramp voltages including 90* to 150* and 210* to 270* portions of sine waves with the 150* point joined to the 210* point; means for developing a DC offset voltage having an amplitude equal to one-half the peak value of the sine waves used in synthesizing said ramp voltages; means for combining said offset voltage with said ramp voltages to define six firing control ramps for use respectively in said six gate firing intervals; a reference control voltage; means for comparing said reference control voltage with said six firing control ramps to develop a control signal in each gate firing interval when the reference voltage and the associated firing control ramp have a predetermined relationship; and trigger means connected with said last named means for each controlled rectifier to initiate a gate firing signal on the occasion of each control signal in the gate firing intervals associated with the respective controlled rectifier and to maintain the gate firing signal for 120* at the frequency of operation.

Claim 4

A gate firing control system for six controlled rectifiers interconnecting an electrical load with a three-phase alternating current source providing three-phAse voltages A, B, and C, comprising: a logic array providing six 120* gate firing intervals synchronized respectively to afford controlled gating of an associated controlled rectifier; means for synthesizing a ramp voltage for each 120* gate firing interval, each of said ramp voltages comprising two sine wave portions joined in the centers of said 120* gate firing intervals, each of said ramp voltages including 90* to 150* and 210* to 270* portions of sine waves with the 150* point joined to the 210* point; means for developing a DC offset voltage having an amplitude equal to one-half the peak value of the sine waves used in synthesizing said ramp voltages; means for combining said offset voltage with said ramp voltages to define six firing control ramps for use respectively in said six gate firing intervals; a reference control voltage; means for comparing said reference control voltage with said six firing control ramps to develop a control signal in each gate firing interval when the reference voltage and the associated firing control ramp have a predetermined relationship; and trigger means connected with said last named means for each controlled rectifier to initiate a gate firing signal on the occasion of each control signal in the gate firing intervals associated with the respective controlled rectifier and to maintain the gate firing signal for 120* at the frequency of operation.

Claim 5

A gate firing control system for a plurality of controlled rectifiers interconnecting an electrical load with a three-phase alternating current source providing three-phase voltages A, B, and C, comprising: a plurality of transformers connected with said source and developing the voltages AB, BC, CA, BA, CB, and AC; a logic array connected with said transformers and supplied voltages developed by said transformers operative to provide gate firing intervals synchronized respectively for gate control of an associated controlled rectifier; means for developing an offset voltage; a plurality of summing amplifiers connected with said transformers, said logic array and said offset voltage developing means combining said offset voltage with said voltages developed by said transformers to define firing control ramps in said gate firing intervals; a reference control voltage; a plurality of comparators for comparing said reference control voltage with said firing control ramps to develop a control signal in each gate firing interval when the reference voltage and the associated firing control ramp have a predetermined relationship; and a plurality of multivibrators connected respectively with said comparators to initiate gate firing signals for respective controlled rectifiers on the occasion of control signals in the associated gate firing intervals.

Claim 6

A gate firing control system for a plurality of controlled rectifiers interconnecting an electrical load with a three-phase alternating current source providing three-phase voltages A, B, and C, comprising: a plurality of transformers connected with said source and developing the voltages AB, BC, CA, BA, CB, and AC; a logic array connected with said transformers and supplied voltages developed by said transformers operative to provide gate firing intervals synchronized respectively for gate control of an associated controlled rectifier; means for developing an offset voltage; a plurality of summing amplifiers connected with said transformers, said logic array and said offset voltage developing means combining said offset voltage with said voltages developed by said transformers to define firing control ramps in said gate firing intervals; a reference control voltage; a plurality of comparators for comparing said reference control voltage with said firing control ramps to develop a control signal in each gate firing interval when the reference voltage and the associated firing control ramp have a predetermined relationship; and a plurality of multivibrators connected respectively with said comparators to initiate gate firing signals for respective controlled rectifiers on the occasion of control signals in the associated gate firing intervals.