Noise reduction circuit having voltage to current converting means in the auxiliary channel

Claim 2

In a noise reduction circuit comprising combining means for generating a combined signal in response to signals supplied thereto, main channel means for supplying an information signal substantially unchanged to said combining means, and auxiliary channel means for receiving said information signal and for supplying a modified information signal to said combining means for combining with said unchanged information signal, said auxiliary channel means including: high pass filter means with a variable cut-off frequency for generating a filtered output signal in response to said information signal supplied thereto; voltage-current converting means for converting the voltage level of said filtered output signal to a current and for supplying said current to said combining means; and amplitude limiting means for limiting the amplitude of said current supplied to said combining means.

Claim 3

The circuit of claim 1; wherein said amplitude limiting means acts on said current to limit the amplitude thereof.

Claim 4

The circuit of claim 1; wherein said combining means is an amplifier means with inverting and non-inverting input terminals, and wherein said main channel means supplies said information signal to said non-inverting input terminal and said auxiliary channel means supplies said modified information signal to said inverting input terminal.

Claim 5

The circuit of claim 1; wherein said auxiliary channel means includes resistor means disposed between said voltage-current converting means and said combining means.

Claim 6

The circuit of claim 4, in which said combining means has an output terminal; and further comprising feedback resistor means connected to said output terminal and said resistor means.

Claim 7

The circuit of claim 5; wherein said auxiliary channel means includes control means for controlling said cut-off frequency of said high pass filter means.

Claim 8

The circuit of claim 5; and further comprising: inverting means connected to said output terminal of said combining means for generating an inverted signal in response to said combined signal supplied thereto; and switch means for alternately supplying said information signal and said inverted signal to said high pass filter means.

Claim 9

The circuit of claim 5; wherein said amplitude limiting means is a pair of PN junction elements reversely connected in parallel.

Claim 10

The circuit of claim 5; wherein said amplitude limiting means comprises first and second amplitude limiting means connected to said output terminal of said combining means for limiting said amplitude of said current, and further comprising switch means for alternately connecting said first amplitude limiting means and said second amplitude limiting means to said voltage-current converting means.

Claim 11

The circuit of claim 9; and further comprising: inverting means for supplying an inverted signal in response to said combined signal supplied thereto; and switch means for alternately supplying said information signal and said inverted signal to said high pass filter means.

Claim 12

The circuit of claim 9; wherein said auxiliary channel means includes second resistor means for connection in series with the first-mentioned resistor means when said switch means connects said voltage-current converting means to said second amplitude limiting means.

Claim 13

The circuit of claim 9; wherein said auxiliary channel means includes second resistor means for connection in series with said voltage-current converting means and said combining means when said switch means connects said second amplitude limiting means to said voltage-current converting means.

Claim 14

The circuit of claim 9; wherein said first amplitude limiting means and said second amplitude limiting means each comprises a pair of PN junction elements reversely connected in parallel.

Claim 15

The circuit of claim 9; wherein said first amplitude limiting means and said second amplitude limiting means each comprises first and second diode means reversely connected in parallel.

Claim 16

A noise reduction circuit comprising: amplifier means having inverting and non-inverting input terminals and an output terminal; main channel means for supplying an information signal substantially unchanged to said non-inverting input terminal of said amplifier means; auxiliary channel means for supplying a signal to said inverting terminal of said amplifier means and including: transfer function means receiving said information signal for generating an output signal with the frequency thereof limited; converting means for converting the voltage level of said output signal from said transfer function means to current and supplying said current to said inverting terminal of said amplifier means; limiting means connected between said output terminal of said amplifier means and said converting means for limiting the amplitude of said current supplied thereto; resistor means connected between said converting means and said inverting terminal of said amplifier means; and feedback resistor means connected between said output terminal and said inverting terminal of said amplifier means.

Claim 17

A noise reduction circuit comprising: amplifier means having inverting and non-inverting input terminals and an output terminal; main channel means for supplying an information signal substantially unchanged to said non-inverting input terminal of said amplifier means; auxiliary channel means for supplying a signal to said inverting terminal of said amplifier means and including: transfer function means receiving said information signal for generating an output signal with the frequency thereof limited; converting means for converting the voltage level of said output signal from said transfer function means to current and supplying said current to said inverting terminal of said amplifier means; limiting means connected between said output terminal of said amplifier means and said converting means for limiting the amplitude of said current supplied thereto; resistor means connected between said converting means and said inverting terminal of said amplifier means; and feedback resistor means connected between said output terminal and said inverting terminal of said amplifier means.

Claim 18

The circuit of claim 15; and further comprising control means for generating control signals for said transfer function means to vary said frequency limited thereby.

Claim 19

The circuit of claim 15; and further comprising: inverting amplifier means connected to said output terminal of said amplifier means for generating an inverted signal in response to a signal supplied thereto; and switch means for alternately supplying said inverted signal and said information signal to said transfer function means.

Claim 20

The circuit of claim 15; wherein said limiting means comprises first and second limiting means for limiting the amplitude of a signal supplied thereto and connected to said output terminal of said amplifier means, and further comprising switch means for alternately connecting said first limiting means and said second limiting means to said converting means.

Claim 21

The circuit of claim 18; and further comprising second resistor means connected in series with said first-mentioned resistor means and also connected to said second limiting means.

Claim 22

The circuit of claim 18; and further comprising second resistor means connected to said inverting terminal of said amplifier means and to said second limiting means.