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US4462003A Expired / Lapsed US ⏱️ 0.0 years remaining

Variable gain amplifier

Assignee: Tektronix Japan Corp
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Filing: 1983-01-10
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Granted: 1984-07-24
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Expires: 2003-01-10
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Abstract

Abstract A variable gain amplifier including common emitter input transistor, a plurality of common base switching transistor to form a cascode amplifier with said input transistor and a resistive network including a plurality of series resistors is disclosed. A plurality of predetermined gains are obtained by programming the resistors. The resistive network may be shared by two or more variable gain amplifiers to provide a selection amplifier.

Inventors

  • 👤 Hajime Takamatsu

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-07 17:30
CPC Classifications
H; H03; H03G; H03G3/00; H03G3/001

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 83 words
A variable gain amplifier, comprising: an input stage transistor for amplifying an input signal; a resistive network including a plurality of resistors connected in series between potential sources; a plurality of switching transistors for supplying the collector current of said input stage transistor to each node of said resistive network; and control means for selectively enabling either one of said switching transistors; wherein an output signal of predetermined different gains is derived from at least one of the resistors of said resistive network.
Claim 2
Dependent Claim 83 words
A variable gain amplifier, comprising: an input stage transistor for amplifying an input signal; a resistive network including a plurality of resistors connected in series between potential sources; a plurality of switching transistors for supplying the collector current of said input stage transistor to each node of said resistive network; and control means for selectively enabling either one of said switching transistors; wherein an output signal of predetermined different gains is derived from at least one of the resistors of said resistive network.
Claim 3
Dependent Claim 22 words
A variable gain amplifier in accordance with claim 1, wherein said input stage transistor and said switching transistors constitute a cascode amplifier.
Claim 4
Dependent Claim 30 words
A variable gain amplifier in accordance with claim 2, wherein said control means is a logic circuit to provide a logic signal to the base electrodes of said switching transistors.
Claim 5
Dependent Claim 23 words
A variable gain amplifier in accordance with claim 1, wherein the resistors of said resistive network have programmed resistance to provide predetermined gains.
Claim 6
Dependent Claim 28 words
A variable gain amplifier in accordance with claim 1 wherein said input stage transistor is a differential amplifier and said switching transistors include a plurality of transistor pairs.
Claim 7
Dependent Claim 34 words
A variable gain amplifier in accordance with claim 5 wherein the base electrodes of each transistor pair of said switching transistor pairs are coupled together to receive a control signal from said control means.
Claim 8
Dependent Claim 119 words
A selection amplifier including first and second variable gain differential amplifiers each amplifying a respective input signal and the outputs thereof coupled together to a common output section having a plurality of resistors connected in series between potential sources, each of said variable gain differential amplifiers comprising: a differential transistor pair; a plurality of switching transistor pairs connected between the collector electrode of each of said differential transistor pair and node of said plurality of resistors in said common output section; and control means for selectively enabling either one pair of said plurality of switching transistor pairs; wherein the collector electrodes of one pair of said switching transistor pairs are coupled together to the mid point of said resistors.
Claim 9
Dependent Claim 119 words
A selection amplifier including first and second variable gain differential amplifiers each amplifying a respective input signal and the outputs thereof coupled together to a common output section having a plurality of resistors connected in series between potential sources, each of said variable gain differential amplifiers comprising: a differential transistor pair; a plurality of switching transistor pairs connected between the collector electrode of each of said differential transistor pair and node of said plurality of resistors in said common output section; and control means for selectively enabling either one pair of said plurality of switching transistor pairs; wherein the collector electrodes of one pair of said switching transistor pairs are coupled together to the mid point of said resistors.
Claim 10
Dependent Claim 27 words
A selection amplifier in accordance with claim 7 further including a polarity switching circuit in at least one of said first and second variable gain differential amplifiers.

References Cited (Backward Citations)

US4328465A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1987-07-24 1988-01-23 1988-07-24 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1991-07-24 1992-01-23 1992-07-24 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1995-07-24 1996-01-23 1996-07-24 $7700.00 Window Closed / Lapsed

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