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US4461944A
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System for interfacing an encoder to a microcomputer
Assignee: General Electric Co
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Filing: 1982-06-07
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Granted: 1984-07-24
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Expires: 2002-06-07
Abstract
Abstract Data generated by an encoder with phase quadrature outputs, for instance a displacement transducer in a resistance spot welder control system, is read out of the interface to the computer in a format compatible with computer languages. The quadrature signals are converted to pulses representing positive and negative unit changes of displacement, and fed to an up-down counter which has signed two's complement values at its output. The most recent displacement data is read out while the counter continuously tracks the encoder.
Inventors
- 👤 Robert K. Cohen
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 10:49
CPC Classifications
G; G06; G06F; G06F3/00; G06F3/05; H; H03; H03M; H03M1/00; H03M1/10; H03M1/12; H03M1/22; H03M1/24; H03M1/28; H03M1/30
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
111 words
In a resistance spot welder control system having a microcomputer, an encoder with phase quadrature outputs, and a displacement interface, the improvement wherein said interface appears to the microcomputer as part of its memory and comprises: means for converting the encoder quadrature output signals to up and down pulses which each represent a unit of displacement in respectively positive and negative directions; up-down counter means to which said pulses are fed and that has binary displacement data at its output; address decode circuitry having an active state output indicating a memory read operation is to be performed from said interface; and means for reading out said displacement data to the microcomputer.
Claim 2
Dependent Claim
111 words
In a resistance spot welder control system having a microcomputer, an encoder with phase quadrature outputs, and a displacement interface, the improvement wherein said interface appears to the microcomputer as part of its memory and comprises: means for converting the encoder quadrature output signals to up and down pulses which each represent a unit of displacement in respectively positive and negative directions; up-down counter means to which said pulses are fed and that has binary displacement data at its output; address decode circuitry having an active state output indicating a memory read operation is to be performed from said interface; and means for reading out said displacement data to the microcomputer.
Claim 3
Dependent Claim
45 words
The system of claim 1 wherein the encoder phase quadrature outputs are binary signals and said converting means is comprised of edge detectors, logic circuitry to determine whether an up or down pulse is to be produced when a signal edge is detected, and pulsers.
Claim 4
Dependent Claim
18 words
The system of claim 2 wherein said counter means provides signed two's complement displacement data at its output.
Claim 5
Dependent Claim
70 words
The system of claim 7 wherein said reading out means is comprised of low and high byte latches into which said displacement data is placed after each updating by the encoder, a data bus buffer, and means for temporarily inhibiting said latches from being updated and for sequentially enabling said low and high byte latches to transfer said displacement data to said data bus buffer and hence to the microcomputer.
Claim 6
Independent Claim
108 words
A system for interfacing an encoder having phase quadrature output signals to a computer comprising: first means for converting the encoder quadrature output signals to two series of pulses which represent positive and negative unit changes of a physical parameter; second means to which said series of pulses are fed that has at its output binary data which is a signed two's complement value indicative of the magnitude and direction of said parameter; and third means for reading out said binary data to said computer upon command when a memory read operation is to be performed while said second means continuously tracks said encoder and is fed pulses.
Claim 7
Independent Claim
108 words
A system for interfacing an encoder having phase quadrature output signals to a computer comprising: first means for converting the encoder quadrature output signals to two series of pulses which represent positive and negative unit changes of a physical parameter; second means to which said series of pulses are fed that has at its output binary data which is a signed two's complement value indicative of the magnitude and direction of said parameter; and third means for reading out said binary data to said computer upon command when a memory read operation is to be performed while said second means continuously tracks said encoder and is fed pulses.
Claim 8
Independent Claim
103 words
A system for interfacing a linear or rotary optical encoder with phase quadrature outputs to a computer comprising: means for converting the encoder quadrature output signals to up and down pulses where each pulse represents a unit of displacement in respectively opposite directions; an up-down counter to which said pulses are fed and that has binary data which is a signed two's complement value indicative of displacement at its output; and means for reading out said displacement data into the computer upon command when a memory read operation is to be performed while said counter continuously tracks said encoder and is fed pulses.
Claim 9
Independent Claim
103 words
A system for interfacing a linear or rotary optical encoder with phase quadrature outputs to a computer comprising: means for converting the encoder quadrature output signals to up and down pulses where each pulse represents a unit of displacement in respectively opposite directions; an up-down counter to which said pulses are fed and that has binary data which is a signed two's complement value indicative of displacement at its output; and means for reading out said displacement data into the computer upon command when a memory read operation is to be performed while said counter continuously tracks said encoder and is fed pulses.
Claim 10
Dependent Claim
33 words
The system of claim 6 wherein the encoder quadrature outputs are binary signals and said converting means generates an up or down pulse when leading and trailing edges of either signal are detected.
Claim 11
Dependent Claim
45 words
The system of claim 7 wherein said reading out means includes a latch into which said displacement data is strobed after each updating and means for temporarily inhibiting said latch from being updated while said displacement data is read out to a data bus buffer.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1987-07-24 | 1988-01-23 | 1988-07-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1991-07-24 | 1992-01-23 | 1992-07-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1995-07-24 | 1996-01-23 | 1996-07-24 | $7700.00 | Window Closed / Lapsed |