Variable equalizer

Claim 2

A variable equalizer for compensating a √f characteristic of a transmission line, f being the frequency of the transmission signal on said transmission line, comprising: variable equalizer units connectd in series with each other and each having a stepwise variable range, said equalizer units having variable step widths different from each other; a comparator for comparing with a reference signal an output signal of said variable equalizer units connected in series; converting means for converting said comparison output signal from said comparator to a digital signal, said digital signal comprising a first portion having a predetermined number of upper order bits and a second portion having a predetermined number of lower order bits; and a control circuit including means for controlling one of said variable equalizer units which has a wide variable step width by said first portion of upper order bits of said digital signal and means for controlling the other of said variable equalizer units which has a narrow variable step width by said second portion of lower order bits of said digital signal.

Claim 3

A variable equalizer as set forth in claim 1 wherein at least one of said variable equalizer units has a √f characteristic.

Claim 4

A variable equalizer as set forth in claim 1 wherein said one of the variable equalizer units having said wider variable step width comprises a variable equalizer sub-unit which has a √f frequency characteristic and a variable filter which has a roll-off cosine frequency characteristic, i.e., which has a constant gain in the lower frequency band and a decreased gain in the higher frequency band, said sub-unit and said variable filter being connected in series with each other.

Claim 5

A variable equalizer as set forth in claim 2 or 3 wherein at least one of said variable equalizer units is made by a large scale integrated circuit, said integrated circuit having operational amplifiers, capacitors and switches for changing the connection of said capacitors.

Claim 6

A variable equalizer as set forth in claim 4 wherein said other of the variable equalizer units which has a narrow variable step width comprises a voltage divider consisting of resistors.

Claim 7

A variable equalizer as set forth in claim 1 wherein said comparator includes a rectifier circuit for rectifying said output signal of said variable equalizer units, a holding circuit for holding the peak value of a rectified signal from said rectifier circuit, a first operational amplifier for comparing an output signal of said holding circuit with a first reference level and for converting said holding circuit output signal to a two-level signal indicative of being greater or less than said first reference level, and a second operational amplifier for comparing said holding circuit output signal with a second reference level which is smaller than said first reference level and for converting said holding circuit output signal to a two-level signal indicative of being greater or less than said second reference level, and wherein said converting means includes logical operation circuits for receiving said comparison output signal from said comparator and a pulse signal having a predetermined period, an up-down counter for receiving outputs of said logical operation circuits.

Claim 8

A variable equalizer comprising: variable equalizer units connected in series with each other and each having a stepwise variable range, said equalizer units having variable step widths different from each other; a comparator for comparing with a reference signal an output signal of said variable equalizer units connected in series; converting means for converting said comparison output signal from said comparator to a digital signal, said digital signal comprising an upper order bit signal and a lower order bit signal; and a control circuit for controlling one of said variable equalizer units which has a wide variable step width by said upper bit signal while controlling the other of said variable equalizer units which has a narrow variable step width by said lower bit signal, wherein said comparator includes a rectifier circuit for rectifying said output signal of said variable equalizer units, a holding circuit for holding the peak value of a rectified signal from said rectifier circuit, a first operational amplifier for comparing an output signal of said holding circuit with a first reference level and for converting said holding circuit output signal to a two-level signal indicative of being greater or less than said first reference level, and a second operational amplifier for comparing said holding circuit output signal with a second reference level which is smaller than said first reference level and for converting said holding circuit output signal to a two-level signal indicative of being greater or less than said second reference level, and wherein said converting means includes logical operation circuits for receiving said comparison output signal from said comparator and a pulse signal having a predetermined period, an up-down counter for receiving outputs of said logical operation circuits.

Claim 9

A variable equalizer comprising: variable equalizer units connected in series with each other and each having a stepwise variable range, said equalizer units having variable step widths different from each other; a comparator for comparing with a reference signal an output signal of said variable equalizer units connected in series; converting means for converting said comparison output signal from said comparator to a digital signal, said digital signal comprising an upper order bit signal and a lower order bit signal; and a control circuit for controlling one of said variable equalizer units which has a wide variable step width by said upper bit signal while controlling the other of said variable equalizer units which has a narrow variable step width by said lower bit signal, wherein said comparator includes a rectifier circuit for rectifying said output signal of said variable equalizer units, a holding circuit for holding the peak value of a rectified signal from said rectifier circuit, a first operational amplifier for comparing an output signal of said holding circuit with a first reference level and for converting said holding circuit output signal to a two-level signal indicative of being greater or less than said first reference level, and a second operational amplifier for comparing said holding circuit output signal with a second reference level which is smaller than said first reference level and for converting said holding circuit output signal to a two-level signal indicative of being greater or less than said second reference level, and wherein said converting means includes logical operation circuits for receiving said comparison output signal from said comparator and a pulse signal having a predetermined period, an up-down counter for receiving outputs of said logical operation circuits.

Claim 10

A variable equalizer for compensating for different transmission line lengths by compensating a √f characteristic of a transmission line, f being the frequency of the transmission signal on said transmission line, comprising: at least first and second variable equalizer units connected in series with each other and each having a stepwise variable equalization range which corresponds to a predetermined line length range, said first equalizer unit having variable step widths corresponding to a plurality of coarse line lengths L i (0≦i≦n) and said second equalizer having variable step widths corresponding to a plurality of fine line lengths l j (0≦j≦m) (where m and n are integers); a comparator for comparing with a reference signal an output signal of said variable equalizer units connected in series; converting means for converting said comparison output signal from said comparator to a digital signal, said digital signal comprising a first portion having a predetermined number of upper order bits corresponding to a predetermined one of said plurality of coarse line lengths L i and a second portion having a predetermined number of lower order bits corresponding to a predetermined one of said plurality of fine line lengths l j ; and a control circuit including means for controlling said first variable unit by said first portion of upper order bits of said digital signal to select an equalization value for said predetermined one of said coarse line lengths L i and means for controlling said second variable equalizer unit by said second portion of lower order bits of said digital signal to select an equalization value for said predetermined one of said fine line lengths l j so that overall equalization is provided to compensate a combined line length of L i +l j .

Claim 11

A variable equalizer for compensating for different transmission line lengths by compensating a √f characteristic of a transmission line, f being the frequency of the transmission signal on said transmission line, comprising: at least first and second variable equalizer units connected in series with each other and each having a stepwise variable equalization range which corresponds to a predetermined line length range, said first equalizer unit having variable step widths corresponding to a plurality of coarse line lengths L i (0≦i≦n) and said second equalizer having variable step widths corresponding to a plurality of fine line lengths l j (0≦j≦m) (where m and n are integers); a comparator for comparing with a reference signal an output signal of said variable equalizer units connected in series; converting means for converting said comparison output signal from said comparator to a digital signal, said digital signal comprising a first portion having a predetermined number of upper order bits corresponding to a predetermined one of said plurality of coarse line lengths L i and a second portion having a predetermined number of lower order bits corresponding to a predetermined one of said plurality of fine line lengths l j ; and a control circuit including means for controlling said first variable unit by said first portion of upper order bits of said digital signal to select an equalization value for said predetermined one of said coarse line lengths L i and means for controlling said second variable equalizer unit by said second portion of lower order bits of said digital signal to select an equalization value for said predetermined one of said fine line lengths l j so that overall equalization is provided to compensate a combined line length of L i +l j .

Claim 12

A variable equalizer as set forth in claim 8, wherein said fine line length range 0≦j≦m is set to substantially equal a line length corresponding to a line length interval represented by a single step change L i to L i+1 of said coarse line length range.

Claim 13

A variable equalizer as set forth in claim 8, wherein at least one of said variable equalizer units has a √f characteristic.

Claim 14

A variable equalizer as set forth in claim 8, wherein said first variable equalizer unit comprises a variable equalizer sub-unit which has a √f frequency characteristic and a variable filter which has a roll-off cosine frequency characteristic, i.e., which has a constant gain in the lower frequency band and a decreased gain in the higher frequency band, said sub-unit and said variable filter being connected in series with each other.

Claim 15

A variable equalizer as set forth in claim 11, wherein at least one of said variable equalizer units is made by a large scale integrated circuit, said integrated circuit having operational amplifiers, capacitors and switches for changing the connection of said capacitors.

Claim 16

A variable equalizer as set forth in claim 12, wherein said first variable equalizer unit is comprised of said large scale integrated circuit and said second variable equalizer unit comprises a voltage divider comprised of resistors to implement the selection of equalization for a fine line length value.