Automatic equalizer circuit

Claim 2

An automatic equalizer for equalizing a communication link having a given bandwidth, said equalizer comprising: means for receiving test signals transmitted over said link which signals have a repetitive sequence of modulation periods including phase modulated signals having a known analog signal shape including a minimum amplitude at predetermined points of said modulation periods when received over a communication link that is phase and amplitude equalized; a plurality of variable amplitude and variable delay sections centered at assigned frequencies located at frequency intervals across said bandwidth, each of said sections having variable signal conditioning characteristics at said assigned frequencies in response to electrical control signals; means for sampling the amplitude of said test signals at said predetermined points of said modulation periods for at least two different test signals received over said link and passed through said plurality of sections; and means connected between said sampling means and the plurality of amplitude and delay sections and responsive to the relative magnitude of samples from said test signals for delivering electrical control signals to said sections, which control signals vary the amplitude and/or delay signal conditioning characteristics thereof at said assigned frequencies.

Claim 3

An autOmatic equalizer in accordance with claim 1 wherein said electrical control signal means comprises: a binary control counter for each of said sections for delivering variable content binary signals thereto.

Claim 4

An automatic equalizer in accordance with claim 2 wherein each of said amplifier sections comprises: a binary gain amplifier having a different amplitude setting associated with different content binary signals; and means connecting said binary gain amplifier to a control counter assigned thereto.

Claim 5

An automatic equalizer in accordance with claim 1 wherein said sampling means comprises: means for storing individual amplitude samples from said test signals, said equalizer further comprising: means for diminishing each of the stored amplitude samples to a predetermined level by a series of metered electrical amounts; and means connected to said diminishing means for counting the total number of metered amounts required to diminish each sampled amplitude of a series of amplitudes from a test signal.

Claim 6

An automatic equalizer in accordance with claim 4 wherein said sample storing means comprises: a sample gate connected to receive a signal passed through said plurality of sections; a storage capacitor connected to said sample gate; and timing means for enabling said sample gate to pass a signal to said storage capacitor at said predetermined points of said modulation periods.

Claim 7

An automatic equalizer in accordance with claim 5 wherein said diminishing means comprises: a current source poled to deliver current in opposition to charges representative of said sampled amplitudes and stored in said storage capacitor; a switching device connected between said current source and said storage capacitor; and means for repetitively enabling and disabling said switching device.

Claim 8

An automatic equalizer in accordance with claim 6 wherein said enabling and disabling means comprises: an oscillator circuit for delivering enabling and disabling signals to said switching device.

Claim 9

An automatic equalizer in accordance with claim 7 wherein said means for counting the total number of metered amounts comprises: an accumulator connected to said oscillator for storing pulses indicative of the number of signals applied therefrom to said switching device for each amplitude sample in a given test signal.

Claim 10

An automatic equalizer in accordance with claim 8 and further comprising: a second accumulator for receiving and storing the oscillator pulses associated with a diminishing operation from a second test signal; and means for comparing the number of counts in said first and second accumulators.

Claim 11

An automatic equalizer in accordance with claim 9 wherein said comparing means comprises: means for emitting a control signal whenever the number of counts in said first accumulator is greater than the number of counts in said second accumulator; and means for applying said control signal to one of said binary control counters to change the binary content thereof.

Claim 12

An automatic equalizer in accordance with claim 1 wherein said bandwidth of said link has a passband defined as (1/T) Hz and having a center frequency of fo where: T is the modulation period, fo is the carrier signal frequency; and Hz is cycles per second.

Claim 13

An automatic equalizer for equalizing a communication link having a given bandwidth, said equalizer system comprising: means for receiving a plurality of test signals transmitted over said link, each signal having a repetitive sequence of modulation periods and a known analog signal shape including a minimum amplitude at predetermined points of said modulation periods when received over a communication link that is phase and amplitude equalized; a plurality of variable amplitude and variable delay sections centered at assigned frequencies substantially across said bandwidth, each of said seCtions having variable signal conditioning characteristics responsive to electrical control signals which vary the amplitude and/or delay characteristics thereof; a plurality of control counters, one each for each amplitude and each delay section for delivering control signals to said sections; means for obtaining an accumulated sample of the amplitude of each of said plurality of test signals at said predetermined points of said modulation periods thereof; sequence control means for selectively actuating the control counters of individual amplitude and individual delay sections in a predetermined sequence at said assigned frequencies at which said sections are centered; and means connected to said sampling means and to the plurality of amplitude and delay sections and responsive to the relative magnitude of accumulated samples from two successive test signals for advancing or retarding the counters selected by said sequence control means.

Claim 14

An automatic equalizer for equalizing a communication link having a given bandwidth, said equalizer system comprising: means for receiving a plurality of test signals transmitted over said link, each signal having a repetitive sequence of modulation periods and a known analog signal shape including a minimum amplitude at predetermined points of said modulation periods when received over a communication link that is phase and amplitude equalized; a plurality of variable amplitude and variable delay sections centered at assigned frequencies substantially across said bandwidth, each of said seCtions having variable signal conditioning characteristics responsive to electrical control signals which vary the amplitude and/or delay characteristics thereof; a plurality of control counters, one each for each amplitude and each delay section for delivering control signals to said sections; means for obtaining an accumulated sample of the amplitude of each of said plurality of test signals at said predetermined points of said modulation periods thereof; sequence control means for selectively actuating the control counters of individual amplitude and individual delay sections in a predetermined sequence at said assigned frequencies at which said sections are centered; and means connected to said sampling means and to the plurality of amplitude and delay sections and responsive to the relative magnitude of accumulated samples from two successive test signals for advancing or retarding the counters selected by said sequence control means.

Claim 15

An automatic equalizer for equalizing a communication link having a given bandwidth, said equalizer system comprising: means for receiving test signals transmitted over said link which signals have a repetitive sequence of modulation periods and a known analog signal shape including a minimum amplitude at predetermined points of said modulation periods when received over a communication link that is phase and amplitude equalized; a plurality of variable amplitude and variable delay sections centered at assigned frequencies located at frequency intervals across said bandwidth, each of said sections having variable signal conditioning characteristics in response to electrical control signals; means for sampling the amplitude of said test signals at said predetermined points of said modulation periods for at least two different test signals received over said link and passed through said plurality of sections; means connected between said sampling means and the plurality of amplitude and delay sections and responsive to the relative magnitude of samples from said test signals for delivering electrical control signals to said sections, which control signals vary the amplitude and/or delay signal conditioning characteristics thereof, said electrical control signal means comprising a binary control counter for each of said sections for delivering variable content binary signals thereto, said equalizer system further characterized in that each of said amplifier sections comprises: a binary gain amplifier having a different amplitude setting associated with different content binary signals; means connecting said binary gain amplifier to a control counter assigned thereto; said amplitude settings of each of said amplifiers are dependent upon the impedance as defined by a series of impedances connected between a point of reference potential and a gain controlling terminal of the amplifier; a plurality of binary weighted impedances connected in parallel to said gain controlling terminal; and means associated with the stages of said control counter for connecting selected impedances to said reference potential when bits of one type are stored therein and for providing an open circuit for selected impedances to said reference potential for bits of another type stored in said counter stages.

Claim 16

An automatic equalizer for equalizing a communication link having a given bandwidth, said equalizer system comprising: means for receiving test signals transmitted over said link which signals have a repetitive sequence of modulation periods and a known analog signal shape including a minimum amplitude at predetermined points of said modulation periods when received over a communication link that is phase and amplitude equalized; a plurality of variable amplitude and variable delay sections centered at assigned frequencies located at frequency intervals across said bandwidth, each of said sections having variable signal conditioning characteristics in response to electrical control signals; means for sampling the amplitude of said test signals at said predetermined points of said modulation periods for at least two different test signals received over said link and passed through said plurality of sections; means connected between said sampling means and the plurality of amplitude and delay sections and responsive to the relative magnitude of samples from said test signals for delivering electrical control signals to said sections, which control signals vary the amplitude and/or delay signal conditioning characteristics thereof, said electrical control signal means comprising a binary control counter for each of said sections for delivering variable content binary signals thereto, said equalizer system further characterized in that each of said amplifier sections comprises: a binary gain amplifier having a different amplitude setting associated with different content binary signals; means connecting said binary gain amplifier to a control counter assigned thereto; said amplitude settings of each of said amplifiers are dependent upon the impedance as defined by a series of impedances connected between a point of reference potential and a gain controlling terminal of the amplifier; a plurality of binary weighted impedances connected in parallel to said gain controlling terminal; and means associated with the stages of said control counter for connecting selected impedances to said reference potential when bits of one type are stored therein and for providing an open circuit for selected impedances to said reference potential for bits of another type stored in said counter stages.

Claim 17

An automatic equalizer for equalizing a communication link having a given bandwidth, said equalizer system comprising: means for receiving test signals transmitted over said link which signals have a repetitive sequence of modulation periods and a known analog signal shape including a minimum amplitude at predetermined points of said modulation periods when received over a communication link that is phase and amplitude equalized; a plurality of variable amplitude and variable delay sections centered at assigned frequencies located at frequency intervals across said bandwidth, each of said sections having variable signal conditioning characteristics in response to electrical control sigNals; means for sampling the amplitude of said test signals at said predetermined points of said modulation periods for at least two different test signals received over said link and passed through said plurality of sections; binary counter means connected between said sampling means and the plurality of amplitude and delay sections and responsive to the relative magnitude of samples from said test signals for delivering electrical control signals to said sections, which control signals vary the amplitude and/or delay signal conditioning characteristics thereof; said equalizer system further characterized in that each of said delay sections comprises: a tuned circuit having different degrees of effectiveness associated with different content binary signals; means connecting said tuned circuit to a control counter assigned thereto; said degree of effectiveness of each of said tuned circuits are dependent upon the impedance as defined by a series of impedances connected between a point of reference potential and a resonant signal controlling terminal of the tuned circuit; a plurality of binary weight impedance connected in parallel to said resonant signal controlling terminal; and means associated with the stages of said control counter for connecting selected impedances to said reference potential when bits of one type are stored therein and for providing an open circuit for selected impedances to said reference potential for bits of another type stored in said counter stages.

Claim 18

An automatic equalizer for equalizing a communication link having a given bandwidth, said equalizer system comprising: means for receiving test signals transmitted over said link which signals have a repetitive sequence of modulation periods and a known analog signal shape including a minimum amplitude at predetermined points of said modulation periods when received over a communication link that is phase and amplitude equalized; a plurality of variable amplitude and variable delay sections centered at assigned frequencies located at frequency intervals across said bandwidth, each of said sections having variable signal conditioning characteristics in response to electrical control sigNals; means for sampling the amplitude of said test signals at said predetermined points of said modulation periods for at least two different test signals received over said link and passed through said plurality of sections; binary counter means connected between said sampling means and the plurality of amplitude and delay sections and responsive to the relative magnitude of samples from said test signals for delivering electrical control signals to said sections, which control signals vary the amplitude and/or delay signal conditioning characteristics thereof; said equalizer system further characterized in that each of said delay sections comprises: a tuned circuit having different degrees of effectiveness associated with different content binary signals; means connecting said tuned circuit to a control counter assigned thereto; said degree of effectiveness of each of said tuned circuits are dependent upon the impedance as defined by a series of impedances connected between a point of reference potential and a resonant signal controlling terminal of the tuned circuit; a plurality of binary weight impedance connected in parallel to said resonant signal controlling terminal; and means associated with the stages of said control counter for connecting selected impedances to said reference potential when bits of one type are stored therein and for providing an open circuit for selected impedances to said reference potential for bits of another type stored in said counter stages.

Claim 19

An automatic equalizer system for equalizing a communication link having a given bandwidth, said equalizer system comprising: means for receiving test signals transmitted over said link which signals include a phase modulated carrier during a repetitive sequence of modulation periods as test signals having a known analog carrier signal shape, which known shape includes minimum amplitudes at predetermined points of adjacent ones of said modulation periods when the phase modulated test signals are received over a communication link that is substantially equalized for phase and amplitude; means responsive to said minimum amplitudes of said phase modulated carrier signal for sampling said test signals at said predetermined point of said modulation period to obtain at least two different sample signals, the values of which are indicative of a required phase and/or amplitude equalization for said communication link; a plurality of variable amplitude and variable delay sections centered at assigned frequencies located at predetermined frequency intervals across said bandwidth, each of said sections having variable signal conditioning characteristics at said assigned frequencies for said communication link when said sections are adjusted; and means connected between said sections and said sampling means and responsive to the relative value of said samples for emitting electrical control signals indicative of required adjustments in the amplitude and/or delay signal conditioning characteristics for predetermined ones of the sections at said assigned frequencies.

Claim 20

An automatic equalizer system for equalizing a communication link having a given bandwidth, said equalizer system comprising: means for receiving test signals transmitted over said link which signals include a phase modulated carrier during a repetitive sequence of modulation periods as test signals having a known analog carrier signal shape, which known shape includes minimum amplitudes at predetermined points of adjacent ones of said modulation periods when the phase modulated test signals are received over a communication link that is substantially equalized for phase and amplitude; means responsive to said minimum amplitudes of said phase modulated carrier signal for sampling said test signals at said predetermined point of said modulation period to obtain at least two different sample signals, the values of which are indicative of a required phase and/or amplitude equalization for said communication link; a plurality of variable amplitude and variable delay sections centered at assigned frequencies located at predetermined frequency intervals across said bandwidth, each of said sections having variable signal conditioning characteristics at said assigned frequencies for said communication link when said sections are adjusted; and means connected between said sections and said sampling means and responsive to the relative value of said samples for emitting electrical control signals indicative of required adjustments in the amplitude and/or delay signal conditioning characteristics for predetermined ones of the sections at said assigned frequencies.