Patent US4189772A successfully refreshed from Google Patents.
Patent US1305202A successfully refreshed from Google Patents.
US4459181A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor pattern definition by selective anodization
Assignee: Eaton Corp
•
Filing: 1982-09-23
•
Granted: 1984-07-10
•
Expires: 2002-09-23
Abstract
Abstract A pattern is defined in a semiconductor wafer by forming one or more notches from a top major surface downwardly beyond the lowermost junction between opposite conductivity type regions, and by anodizing the wafer to provide a columnated porous region below and substantially confined to the lateral dimension of each notch. Anodization current flows substantially vertically, without significant lateral spreading. The porous regions are oxidized to afford well-defined vertically bordered insulative regions separating the lowermost junctions on opposite sides thereof.
Inventors
- 👤 James A. Benjamin
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 16:51
CPC Classifications
H; H10; H10P; H10P50/00; H10P50/60; H10P50/61; H10P50/613; C; C25; C25D; C25D11/00; C25D11/02; C25D11/32; H10P90/00; H10P90/19; H10P90/1904; H10P90/1906; H10P90/191; H10W; H10W10/00; H10W10/10; H10W10/181
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
69 words
A selective anodization technique for pattern definition in a semiconductor having a top major surface and at least two regions of opposite conductivity type forming at least one junction below said top major surface, comprising forming a notch from said top major surface downwardly beyond the lowermost junction, and anodizing said semiconductor to provide a columnated porous region below and substantially confined to the lateral dimension of said notch.
Claim 2
Dependent Claim
69 words
A selective anodization technique for pattern definition in a semiconductor having a top major surface and at least two regions of opposite conductivity type forming at least one junction below said top major surface, comprising forming a notch from said top major surface downwardly beyond the lowermost junction, and anodizing said semiconductor to provide a columnated porous region below and substantially confined to the lateral dimension of said notch.
Claim 3
Dependent Claim
30 words
The invention according to claim 1 wherein anodization current flows substantially vertically between the bottom major surface of said semiconductor and the bottom of said notch, without significant lateral spreading.
Claim 4
Dependent Claim
28 words
The invention according to claim 2 comprising oxidizing said porous region, whereby to afford a well-defined vertically bordered insulative region separating the lowermost junctions on opposite sides thereof.
Claim 5
Dependent Claim
33 words
The invention according to claim 3 further comprising removing anodized oxidized material by etching to yield a groove, and then performing another anodization from the bottom of the groove, forming a deeper groove.
Claim 6
Dependent Claim
100 words
Semiconductor pattern definition by selective anodization comprising: providing a semiconductor wafer having top and bottom major surfaces and at least two regions of opposite conductivity type forming at least one junction below said top major surface; forming a plurality of notches in said wafer from said top major surface downwardly beyond the lowermost junction; and anodizing said wafer such that anodization current flows substantially vertically between said bottom major surface and the bottoms of said notches, without significant lateral spreading, to provide a plurality of columnated porous regions below and substantially confined to the lateral dimensions of respective said notches.
Claim 7
Dependent Claim
100 words
Semiconductor pattern definition by selective anodization comprising: providing a semiconductor wafer having top and bottom major surfaces and at least two regions of opposite conductivity type forming at least one junction below said top major surface; forming a plurality of notches in said wafer from said top major surface downwardly beyond the lowermost junction; and anodizing said wafer such that anodization current flows substantially vertically between said bottom major surface and the bottoms of said notches, without significant lateral spreading, to provide a plurality of columnated porous regions below and substantially confined to the lateral dimensions of respective said notches.
Claim 8
Dependent Claim
29 words
The invention according to claim 5 comprising oxidizing said wafer to afford a plurality of well-defined vertically bordered insulative regions separating the respective lowermost junctions on opposite sides thereof.
Claim 9
Dependent Claim
94 words
A selective two step anodization technique for pattern definition in a semiconductor having a top major surface and at least two regions of opposite conductivity type forming at least one junction below said top major surface, comprising forming a notch from said top major surface downwardly beyond the lowermost junction, anodizing said semiconductor to provide a columnated porous region below and a substantially confined to the lateral dimensions of said notch, removing anodized material by etching to yield a groove, and performing another anodization from the bottom of said groove, forming a deeper groove.
Claim 10
Dependent Claim
94 words
A selective two step anodization technique for pattern definition in a semiconductor having a top major surface and at least two regions of opposite conductivity type forming at least one junction below said top major surface, comprising forming a notch from said top major surface downwardly beyond the lowermost junction, anodizing said semiconductor to provide a columnated porous region below and a substantially confined to the lateral dimensions of said notch, removing anodized material by etching to yield a groove, and performing another anodization from the bottom of said groove, forming a deeper groove.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1987-07-10 | 1988-01-09 | 1988-07-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1991-07-10 | 1992-01-09 | 1992-07-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1995-07-10 | 1996-01-09 | 1996-07-10 | $7700.00 | Window Closed / Lapsed |