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US4458110A Expired / Lapsed US ⏱️ 0.0 years remaining

Storage element for speech synthesizer

Assignee: ESS Technology Inc
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Filing: 1979-10-02
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Granted: 1984-07-03
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Expires: 1999-10-02
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Abstract

Abstract A storage device for use with a synthesizer of original information bearing time domain signals from compressed information time domain signals produced by predetermined different signal compression techniques. The storage device contains compressed information time domain signals and instruction signals specifying the particular compression technique applied to the original information bearing time domain signals to produce corresponding portions of the compressed information time domain signals. The compressed information time domain signals comprise a plurality of samples resulting from the predetermined signal compression techniques, the number of the different signal compression techniques applied to the original signals being greater than two and the ratio of the plurality of the samples to the minimum number of samples required to uniquely and intelligibly identify the original information bearing signals being no greater than about 0.2.

Inventors

  • 👤 Forrest S. Mozer

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 06:24
CPC Classifications
G; G10; G10L; G10L13/00; G10L13/02; G10L13/04; G10L13/047; G10L19/00

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 162 words
For use with a synthesizer of original information bearing time domain signals from compressed information time domain signals produced by predetermined different signal compression techniques, a memory device comprising: means for storing said compressed time domain signals and instruction signals in the form of X period zeroed representations of said original time domain signals, wherein X is a fraction in the range from about one-fourth to about three-fourths, specifying the particular X period zeroing compression technique applied to said original information bearing time domain signals to produce corresponding portions of said compressed information time domain signals, said compressed information time domain signals comprising a plurality of samples resulting from said predetermined X period zeroing signal compression technique; and means for enabling said compressed information time domain signals and said instruction signals to be read out from said memory device to enable said compressed information time domain signals to be expanded using the X period zeroing technique specified by the corresponding instruction signals.
Claim 2
Dependent Claim 162 words
For use with a synthesizer of original information bearing time domain signals from compressed information time domain signals produced by predetermined different signal compression techniques, a memory device comprising: means for storing said compressed time domain signals and instruction signals in the form of X period zeroed representations of said original time domain signals, wherein X is a fraction in the range from about one-fourth to about three-fourths, specifying the particular X period zeroing compression technique applied to said original information bearing time domain signals to produce corresponding portions of said compressed information time domain signals, said compressed information time domain signals comprising a plurality of samples resulting from said predetermined X period zeroing signal compression technique; and means for enabling said compressed information time domain signals and said instruction signals to be read out from said memory device to enable said compressed information time domain signals to be expanded using the X period zeroing technique specified by the corresponding instruction signals.
Claim 3
Dependent Claim 9 words
The combination of claim 1 wherein X is one-half.
Claim 4
Dependent Claim 152 words
For use with a synthesizer of original information bearing time domain signals from compressed information time domain signals produced by predetermined different signal compression techniques, a memory device comprising: means for storing said compressed information time domain signals and instruction signals in the form of floating-zero, two-bit delta modulated representations of said original time domain signals specifying the particular delta modulation compression technique applied to said original information bearing time domain signals to produce corresponding portions of said compressed information time domain signals, said compressed information time domain signals comprising a plurality of samples resulting from said predetermined floating-zero, two-bit delta modulation signal compression technique; and means for enabling said compressed information time domain signals and said instruction signals to be read out from said memory device to enable said compressed information time domain signals to be expanded using the floating-zero, 2-bit delta modulation expansion technique specified by the corresponding instruction signals.
Claim 5
Dependent Claim 152 words
For use with a synthesizer of original information bearing time domain signals from compressed information time domain signals produced by predetermined different signal compression techniques, a memory device comprising: means for storing said compressed information time domain signals and instruction signals in the form of floating-zero, two-bit delta modulated representations of said original time domain signals specifying the particular delta modulation compression technique applied to said original information bearing time domain signals to produce corresponding portions of said compressed information time domain signals, said compressed information time domain signals comprising a plurality of samples resulting from said predetermined floating-zero, two-bit delta modulation signal compression technique; and means for enabling said compressed information time domain signals and said instruction signals to be read out from said memory device to enable said compressed information time domain signals to be expanded using the floating-zero, 2-bit delta modulation expansion technique specified by the corresponding instruction signals.

References Cited (Backward Citations)

US3501750A Cited
US3641496A Cited
US3784754A Cited
US3763364A Cited
US3809786A Cited
US3803358A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1987-07-03 1988-01-02 1988-07-03 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1991-07-03 1992-01-02 1992-07-03 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1995-07-03 1996-01-02 1996-07-03 $7700.00 Window Closed / Lapsed

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