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US4456838A Expired / Lapsed US ⏱️ 0.0 years remaining

Level shifting circuit

Assignee: Toshiba Corp
•
Filing: 1981-02-25
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Granted: 1984-06-26
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Expires: 2001-02-25
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Abstract

Abstract An output circuit and a biasing circuit for biasing an oscillation circuit comprise a current mirror circuit. The DC level of the output signal from the oscillation circuit is level shifted by controlling the current of the current mirror circuit comprising the biasing circuit and the output circuit. This control is performed by suitably determining the number of diodes and the resistances of the resistors making up the current mirror circuit. The biasing circuit of the oscillation circuit may thus be utilized as the level shifting circuit, the DC level of the output signal of the oscillation circuit may be set to a predetermined level, and fluctuations in the duty ratio of the oscillation output may be suppressed.

Inventors

  • 👤 Shinichiro Taguchi
  • 👤 Nobuya Nagao
  • 👤 Yutaka Ogihara

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 20:08
CPC Classifications
H; H03; H03K; H03K5/00; H03K5/003

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 152 words
A level shift circuit comprising: a first transistor having a base terminal, a collector terminal and an emitter terminal, said base terminal being biased at a first DC level and being coupled to a signal source circuit, said collector terminal being biased at a second DC level and said emitter terminal being connected to a first current branch; a second transistor having base, collector and emitter terminals, said collector terminal of said second transistor being connected to said second DC level, said base terminal being connected to the first DC level and said emitter terminal being connected to a second current branch; a current mirror connected between said first and second current branches, whereby substantially equal current flows therethrough; and an output terminal connected to said first branch for delivering an AC signal therefrom and wherein each of said first and second current branches include a series of diodes and a resistor.
Claim 2
Dependent Claim 152 words
A level shift circuit comprising: a first transistor having a base terminal, a collector terminal and an emitter terminal, said base terminal being biased at a first DC level and being coupled to a signal source circuit, said collector terminal being biased at a second DC level and said emitter terminal being connected to a first current branch; a second transistor having base, collector and emitter terminals, said collector terminal of said second transistor being connected to said second DC level, said base terminal being connected to the first DC level and said emitter terminal being connected to a second current branch; a current mirror connected between said first and second current branches, whereby substantially equal current flows therethrough; and an output terminal connected to said first branch for delivering an AC signal therefrom and wherein each of said first and second current branches include a series of diodes and a resistor.
Claim 3
Dependent Claim 25 words
A level shift circuit according to claim 1, which further comprises at least one p-n junction disposed between said output terminal and a reference potential.
Claim 4
Dependent Claim 51 words
A level shift circuit according to claim 12, wherein said current mirror circuit is composed of a diode connected to said second current branch and a transistor having a collector connected to said first current branch, and a base connected at a junction of said second current branch and said diode.
Claim 5
Dependent Claim 25 words
A level shift circuit according to claim 3, wherein a node of said second branch is adapted to be connected to said signal source circuit.

References Cited (Backward Citations)

US3766412A Cited
US3982197A Cited
US3999139A Cited
US4346312A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1987-06-26 1987-12-26 1988-06-26 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1991-06-26 1991-12-26 1992-06-26 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1995-06-26 1995-12-26 1996-06-26 $7700.00 Window Closed / Lapsed

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