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US4454573A
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Current regulator circuit
Assignee: ASR Servotron AG
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Filing: 1982-08-09
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Granted: 1984-06-12
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Expires: 2002-08-09
Abstract
Abstract A digital current regulator circuit, especially useful for a DC motor, is described which is fed directly, i.e., without power transformers, from the AC mains, via power transistors (T1-T4) that are controlled by pulse modulation and which can work in four-quadrant operation. An A/D converter (12) generates from samples of the motor current, an actual-value signal in the form of a multi-bit parallel binary code; and a binary comparator (20) compares the actual-value code with a theoretical-value code and generates binary error signals if the actual value is greater or less than the theoretical value. To provide DC-isolation of the power transistors and associated circuitry from the control circuitry that generates the error signals, the parallel bits of the actual-value code are transmitted to the control circuitry through an opto-electronic coupler (14). Other opto-electronic couplers (16, 30) can be provided to transmit other control signals.
Inventors
- 👤 Johann Petsch
- 👤 Eric F. Kohn
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 13:13
CPC Classifications
H; H02; H02P; H02P7/00; H02P7/06; H02P7/18; H02P7/24; H02P7/28; H02P7/285; H02P7/29; H02P7/03; H02P7/04; H02P7/281; H02P2205/00; H02P2205/01; Y; Y10; Y10S; Y10S388/00; Y10S388/90; Y10S388/901; Y10S388/903; Y10S388/907; Y10S388/91; Y10S388/923; Y10S388/933
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
188 words
A current regulator circuit for a DC load comprising: a power driver stage comprising: power switches connected in a bridge circuit, and means for generating an actual-value signal corresponding to the current flowing in the load, and a control stage comprising: means for comparing the actual-value signal with a theoretical-value signal and generating error signals corresponding to the difference, means for using said error signals to control the power switches, and means for DC-isolating the power driver stage characterized in that: the generating means comprises an A/D converter which generates the actual-value signal as a binary code having a multiplicity of bits, based on its sampling of the current that flows in the load, the comparing means compares the actual-value signal in the form of parallel bits with the theoretical-value signal, where the latter likewise consists of a plurality of parallel bits and corresponds to a prescribed or desired load current, and generates different outputs depending on whether the actual value is greater or less than the theoretical value, and the actual-value signal is coupled from the power driver stage to the control stage by an opto-electronic coupler.
Claim 2
Dependent Claim
188 words
A current regulator circuit for a DC load comprising: a power driver stage comprising: power switches connected in a bridge circuit, and means for generating an actual-value signal corresponding to the current flowing in the load, and a control stage comprising: means for comparing the actual-value signal with a theoretical-value signal and generating error signals corresponding to the difference, means for using said error signals to control the power switches, and means for DC-isolating the power driver stage characterized in that: the generating means comprises an A/D converter which generates the actual-value signal as a binary code having a multiplicity of bits, based on its sampling of the current that flows in the load, the comparing means compares the actual-value signal in the form of parallel bits with the theoretical-value signal, where the latter likewise consists of a plurality of parallel bits and corresponds to a prescribed or desired load current, and generates different outputs depending on whether the actual value is greater or less than the theoretical value, and the actual-value signal is coupled from the power driver stage to the control stage by an opto-electronic coupler.
Claim 3
Dependent Claim
88 words
A current regulator circuit according to claim 1 further characterized in that: an input to the A/D converter is connected with a sample and hold circuit that cyclically samples the load current, stores the sample values, and delivers them to the A/D converter, an output from the A/D converter is connected to a signal memory that is connected in turn to said comparing means, and timing signals from a sequence control unit control said sample and hold circuit, said A/D converter, said signal memory and said comparing means.
Claim 4
Dependent Claim
56 words
A current regulator circuit according to claim 2 further characterized in that: the bridge circuit comprises power transistors, and an operational amplifier is connected between the power transistors and the sample and hold circuit, said operational amplifier forming the difference of the current values of the two bridge diagonals, from which is formed the actual-value signal.
Claim 5
Dependent Claim
31 words
A current regulator circuit according to claim 3 further characterized in that a filter is connected between the power transistors and the sample and hold circuit to limit the regulator bandwidth.
Claim 6
Dependent Claim
55 words
A current regulator circuit according to claim 1 further characterized in that the actual-value signal is conducted to a protective circuit that responds to an unallowed excess current by generating a binary excess-current signal that is transmitted into the control stage through an opto-electronic coupling element and applied to pre-drivers for the power driver stage.
Claim 7
Dependent Claim
60 words
A current regulator circuit according to claim 1 further characterized in that at least one of the actual-value signal and the theoretical-value signal is conducted to the comparing means through a buffer- and signal-storage means and through an input filter, which limits the rate of change of the respective code to approximately half the bandwidth of the current regulator circuit.
Claim 8
Dependent Claim
51 words
A current regulator circuit according to claim 1 further characterized in that the theoretical-value and actual-value signals are transmitted in two's complement to the comparing means and the comparing means checks the sign of the theoretical-value and actual-value signals and generates an alarm signal in the event of a sign deviation.
Claim 9
Dependent Claim
38 words
A current regulator circuit according to claim 1 further characterized in that error signals generated by the comparing means are applied to gate elements in the control stage that are controlled by the output signal of a modulator.
Claim 10
Dependent Claim
31 words
A current regulator circuit according to claim 8 further characterized in that the modulator is controlled by an rpm control for the motor that is driven by the power driver stage.
Claim 11
Dependent Claim
30 words
A current regulator circuit according to claim 1 further characterized in that the actual-value signal is transmitted into the control stage by way of at least one glass fiber line.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1987-06-12 | 1987-12-12 | 1988-06-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1991-06-12 | 1991-12-12 | 1992-06-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1995-06-12 | 1995-12-12 | 1996-06-12 | $7700.00 | Window Closed / Lapsed |