Control device with mode flags for dedicating memory segments as either scratchpad or timing control registers

Claim 2

An output control device for requesting output control signals on a plurality of output channels, comprising: (A) storing means for storing output time data designating the desired time to produce an output control signal and mask data designating whether said storing means is dedicated for use as a register which holds said output time data or is free to be used as working random access memory; (B) first means connected to said storing means for retrieving said mask data and said output time data stored in said storing means; (C) a timer for producing a value representative of absolute time; (D) comparing means connected to said timer and said storing means for comparing the contents of said timer with said output time data retrieved by said first means and for issuing a coincidence detection signal in response to a coincidence of the contents of said timer and said retrieved output time data; and (E) second means connected to said storing means and said comparing means for determining whether to use said storing means as a register which holds said output time data or as a working random access memory in response to said mask data.

Claim 3

An output control device for requesting output control signals on a plurality of output channels, comprising: (A) storing means for storing output time data designating the desired time to produce an output control signal, mask data designating whether said storing means is dedicated for use as a register which holds said output time data or is free to be used as working random access memory, and channel designating data designating the output channels on which an output signal is desired; (B) first means connected to said storing means for retrieving said output time data, said mask data, and said channel data stored in said storing means; (C) a timer for producing a value representative of absolute time; (D) comparing means connected to said timer and said storing means for comparing the contents of said timer with said output time data retrieved by said first means and for issuing a coincidence detection signal in response to a coincidence of contents of said timer and said retrieved output time data; (E) second means connected to said storing means and said comparing means for determining whether to use said storing means as a register which holds said output time data or as a working random access memory in response to said mask data; and (F) third means connected to said storing means and said second means for requesting an output signal at an output channel designated by said channel designating data when said second means has determined to use said storing means as a register.

Claim 4

An output control device for requesting output control signals on a plurality of output channels, comprising: (A) storing means for storing output time data designating the desired time to produce an output control signal, mask data designating whether said storing means is dedicated for use as a register which holds said output time data or is free to be used as working random access memory, and channel designating data designating the output channels on which an output signal is desired; (B) first means connected to said storing means for retrieving said output time data, said mask data, and said channel data stored in said storing means; (C) a timer for producing a value representative of absolute time; (D) comparing means connected to said timer and said storing means for comparing the contents of said timer with said output time data retrieved by said first means and for issuing a coincidence detection signal in response to a coincidence of contents of said timer and said retrieved output time data; (E) second means connected to said storing means and said comparing means for determining whether to use said storing means as a register which holds said output time data or as a working random access memory in response to said mask data; and (F) third means connected to said storing means and said second means for requesting an output signal at an output channel designated by said channel designating data when said second means has determined to use said storing means as a register.

Claim 5

An output control device for requesting output control signals on a plurality of output channels, comprising: (A) first storing means for storing output time data designating the desired time to produce an output control signal and mask data designating whether said storing means is dedicated for use as a register which holds said output time data or is free to be used as working random access memory for use on predetermined output channels; (B) a second storing means for storing said mask data, said output time data, and output channel data designating the output channel on which an output signal is desired; (C) first means connected to said first and second storing means for retrieving said mask data and said output time data stored in said first and second storing means; (D) a timer for producing a value representative of absolute time; (E) comparing means connected to said timer for comparing the contents of said timer with said output time data retrieved by said first means and for issuing a coincidence detection signal in response to a coincidence of contents of said timer and said retrieved output time data; (F) second means connected to said first and second storing means and said comparing means for determining whether to use said first and second storing means as registers which hold output time data or as working random access memories in response to said mask data; and (G) third means connected to said first and second storing means and said second means for determining whether to request an output signal at an output channel bearing a fixed relationship to said first storing means or at an output channel designated by said channel designating data when said second means has determined to use said first and second storing means as registers.

Claim 6

An output control device for requesting output control signals on a plurality of output channels, comprising: (A) first storing means for storing output time data designating the desired time to produce an output control signal and mask data designating whether said storing means is dedicated for use as a register which holds said output time data or is free to be used as working random access memory for use on predetermined output channels; (B) a second storing means for storing said mask data, said output time data, and output channel data designating the output channel on which an output signal is desired; (C) first means connected to said first and second storing means for retrieving said mask data and said output time data stored in said first and second storing means; (D) a timer for producing a value representative of absolute time; (E) comparing means connected to said timer for comparing the contents of said timer with said output time data retrieved by said first means and for issuing a coincidence detection signal in response to a coincidence of contents of said timer and said retrieved output time data; (F) second means connected to said first and second storing means and said comparing means for determining whether to use said first and second storing means as registers which hold output time data or as working random access memories in response to said mask data; and (G) third means connected to said first and second storing means and said second means for determining whether to request an output signal at an output channel bearing a fixed relationship to said first storing means or at an output channel designated by said channel designating data when said second means has determined to use said first and second storing means as registers.

Claim 7

An output control device according to claim 1, wherein said storing means comprises a plurality of registers.

Claim 8

An output control device according to claim 1, wherein said first means retrieves data in said storing means on a time-sharing basis.

Claim 9

An output control device according to claim 2, wherein said storing means comprises a plurality of registers.

Claim 10

An output control device according to claim 2, wherein said first means retrieves data in said storing means on a time-sharing basis.

Claim 11

An output control device according to claim 3, wherein said first and second storing means comprise a plurality of registers.

Claim 12

An output control device according to claim 3, wherein said first means retrieves data in said first and second storing means on a time-sharing basis.

Claim 13

An output control device which can be used in a digital processing system, which can be connected to a data bus of said system, and which is responsive to clock pulses, comprising: (A) a data bus; (B) means for receiving and storing output time data designating the desired time to produce an output control signal and mask data designating whether said storing means in dedicated for used as a register which holds said output time data or is free to be used as working random access memory, from said data bus in response to signals on said data bus; (C) gate means connected to said storing means for controlling transfer of said mask data and said output time data from said storing means; (D) gate control means connected to said gate means for supplying a switching control signal to said gate means in response to clock pulses to thereby retrieve data in said storing means; (E) counting means connected to said storing means and to said data bus for counting at a rate determined by clock pulses; (F) comparing means connected to said counting means and to said storing means for generating a coincidence signal in response to a coincidence of contents of said counting means and said output time data; and (G) means connected to said counting means and said storing means for determining whether to use said storing means as a register which holds said output time data or as a working random access memory in response to a coincidence of contents of said counting means and said output time data.

Claim 14

An output control device which can be used in a digital processing system, which can be connected to a data bus of said system, and which is responsive to clock pulses, comprising: (A) a data bus; (B) means for receiving and storing output time data designating the desired time to produce an output control signal and mask data designating whether said storing means in dedicated for used as a register which holds said output time data or is free to be used as working random access memory, from said data bus in response to signals on said data bus; (C) gate means connected to said storing means for controlling transfer of said mask data and said output time data from said storing means; (D) gate control means connected to said gate means for supplying a switching control signal to said gate means in response to clock pulses to thereby retrieve data in said storing means; (E) counting means connected to said storing means and to said data bus for counting at a rate determined by clock pulses; (F) comparing means connected to said counting means and to said storing means for generating a coincidence signal in response to a coincidence of contents of said counting means and said output time data; and (G) means connected to said counting means and said storing means for determining whether to use said storing means as a register which holds said output time data or as a working random access memory in response to a coincidence of contents of said counting means and said output time data.

Claim 15

An output control device which can be used in a digital processing system, which can be connected to a data bus of said system, and which is responsive to clock pulses, comprising: (A) a data bus; (B) means for receiving and storing output time data designating the desired time to produce an output control signal, mask data designating whether said storing means is dedicated for use as a register which holds said output time data or is free to be used as working random access memory, and channel designating data designating the output channels on which an output signal is desired from said data bus, said means receiving and storing all of said data from said data bus in response to signals on said data bus; (C) first gate means connected to said storing means for controlling transfer of said mask data, said channel designating data and said output time data from said storing means; (D) gate control means connected to said first gate means for supplying a switching control signal to said gate means in response to clock pulses to thereby retrieve data in said storing means; (E) counting means connected to said storing means and to said data bus for counting at a rate determined by clock pulses; (F) comparing means connected to said counting means and to said storing means for generating a coincidence signal in response to a coincidence of contents of said counting means and said output time data; (G) means connected to said counting means and said storing means for determining whether to supply a coincidence signal output from said comparing means to a selecting means to be described later, in response to a coincidence of contents of said counting means and said output time data; (H) selecting means connected to said storing means and to said gate control means to which are input said channel designating data and a signal output from said gate control means, and which outputs said channel designating data or said signal output from said gate control means in response to a select signal from said gate control means; (I) second gate means for outputting data output from said selecting means in synchronism with output of said coincidence signal; and (J) flip-flops connected to said second gate means for holding data output from said second gate means.

Claim 16

An output control device which can be used in a digital processing system, which can be connected to a data bus of said system, and which is responsive to clock pulses, comprising: (A) a data bus; (B) means for receiving and storing output time data designating the desired time to produce an output control signal, mask data designating whether said storing means is dedicated for use as a register which holds said output time data or is free to be used as working random access memory, and channel designating data designating the output channels on which an output signal is desired from said data bus, said means receiving and storing all of said data from said data bus in response to signals on said data bus; (C) first gate means connected to said storing means for controlling transfer of said mask data, said channel designating data and said output time data from said storing means; (D) gate control means connected to said first gate means for supplying a switching control signal to said gate means in response to clock pulses to thereby retrieve data in said storing means; (E) counting means connected to said storing means and to said data bus for counting at a rate determined by clock pulses; (F) comparing means connected to said counting means and to said storing means for generating a coincidence signal in response to a coincidence of contents of said counting means and said output time data; (G) means connected to said counting means and said storing means for determining whether to supply a coincidence signal output from said comparing means to a selecting means to be described later, in response to a coincidence of contents of said counting means and said output time data; (H) selecting means connected to said storing means and to said gate control means to which are input said channel designating data and a signal output from said gate control means, and which outputs said channel designating data or said signal output from said gate control means in response to a select signal from said gate control means; (I) second gate means for outputting data output from said selecting means in synchronism with output of said coincidence signal; and (J) flip-flops connected to said second gate means for holding data output from said second gate means.

Claim 17

An output control device which can be used in a digital processing system, which can be connected to a data bus of said system, and which is responsive to clock pulses, comprising: (A) a data bus; (B) first storing means for receiving and storing output time data designating the desired time to produce an output control signal and mask data designating whether said storing means is dedicated for use as a register which holds said output time data or is free to be used as working random access memory, from said data bus in response to signals on said data bus; (C) second storing means for receiving and storing said mask data, channel designating data designating the output channels on which an output signal is desired, and said output time data from said data bus in response to signals on said data bus; (D) first and second gate means connected to said first and second storing means for controlling transfer of said mask data, said channel designating data, and said output time data output from said first and second storing means; (E) gate control means connected to said first and second gate means for supplying a switching control signal to said first and second gate means in response to clock pulses to thereby retrieve data in said first and second storing means; (F) counting means connected to said first and second storing means and to said data bus, for counting at a rate determined by clock pulses; (G) comparing means connected to said counting means and said first and second storing means for generating a coincidence signal in response to a coincidence of contents of said counting means and said output time data; (H) means connected to said first and second storing means, said comparing means, and selecting means to be described later, for determining whether or not to supply a coincidence signal output from said comparing means to selecting means to be described later, in response to said mask data; (I) selecting means connected to said first and second storing means and to said gate control means, to which are input said channel designating data and a signal output from said gate control means, and which outputs said channel designating data or said signal output from said gate control means in response to a select signal from said gate control means; (J) second gate means for outputting data output from said selecting means in synchronism with output of said coincidence signal; and (K) flip-flops connected to said second gate means for holding data output from said second gate means.

Claim 18

An output control device which can be used in a digital processing system, which can be connected to a data bus of said system, and which is responsive to clock pulses, comprising: (A) a data bus; (B) first storing means for receiving and storing output time data designating the desired time to produce an output control signal and mask data designating whether said storing means is dedicated for use as a register which holds said output time data or is free to be used as working random access memory, from said data bus in response to signals on said data bus; (C) second storing means for receiving and storing said mask data, channel designating data designating the output channels on which an output signal is desired, and said output time data from said data bus in response to signals on said data bus; (D) first and second gate means connected to said first and second storing means for controlling transfer of said mask data, said channel designating data, and said output time data output from said first and second storing means; (E) gate control means connected to said first and second gate means for supplying a switching control signal to said first and second gate means in response to clock pulses to thereby retrieve data in said first and second storing means; (F) counting means connected to said first and second storing means and to said data bus, for counting at a rate determined by clock pulses; (G) comparing means connected to said counting means and said first and second storing means for generating a coincidence signal in response to a coincidence of contents of said counting means and said output time data; (H) means connected to said first and second storing means, said comparing means, and selecting means to be described later, for determining whether or not to supply a coincidence signal output from said comparing means to selecting means to be described later, in response to said mask data; (I) selecting means connected to said first and second storing means and to said gate control means, to which are input said channel designating data and a signal output from said gate control means, and which outputs said channel designating data or said signal output from said gate control means in response to a select signal from said gate control means; (J) second gate means for outputting data output from said selecting means in synchronism with output of said coincidence signal; and (K) flip-flops connected to said second gate means for holding data output from said second gate means.

Claim 19

An output control device according to claim 10, wherein said storing means comprises a plurality of registers.

Claim 20

An output control device according to claim 10, wherein said gate control means supplies a switching control signal to said gate means for retrieving data in said storing means on a time-sharing basis.

Claim 21

An output control device according to claim 11, wherein said storing means comprises a plurality of registers.

Claim 22

An output control device according to claim 11, wherein said gate control means supplies a switching control signal to said gate means for retrieving data in said storing means on a time-sharing basis.

Claim 23

An output control device according to claim 12, wherein said first and second storing means comprise a plurality of registers.

Claim 24

An output control device according to claim 12, wherein said gate control means supplies a switching control signal to said first and second gate means for retrieving data in said first and second storing means on a time-sharing basis.

Claim 25

An output control device according to claim 1, further comprising a data bus to which is connected said storing means.

Claim 26

An output control device according to claim 1, 2 or 3, wherein said first means comprises a shifter for sequentially outputting control signals for storing data in said registers in response to input of externally generated clock pulses.

Claim 27

An output control device according to claim 1, 2 or 3, wherein said second means comprises a gate.

Claim 28

An output control device according to claim 2 or 3, wherein said third means comprises: a selector connected to said first means and to said storing means, to which are input said channel designating data and a signal output from said first means, and which outputs said channel designating data or said signal output from said first means in response to a select signal from said first means; gates connected to said selector for outputting data output from said selector in synchronism with time coincidence detection data output from said comparing means; and flip-flops connected to said gates for holding data output from said gates.