Abstract A semiconductor device comprising a semiconductor substrate of an N conductivity type; an insulation layer of a predetermined pattern for selectively covering the substrate; a first region of a P conductivity type formed in that area of the substrate which is surrounded by the insulation layer; a second region of the P + conductivity type having a high impurity concentration and formed in the first region; a third region of the N conductivity type formed in the first region; a polycrystalline silicon layer formed on the major surface of the substrate, said polycrystalline silicon layer comprising a first portion of the P conductivity type contacting the second region, a second portion of the N conductivity type contacting the third region and a third portion contacting the first region, said first and second portions constituting first and second contacting electrodes, respectively, and the third portion having a predetermined impurity concentration and constituting a separation portion for insulating the first and second portions from each other.
A semiconductor device comprising: a semiconductor substrate of a first conductivity type; an insulation layer of a predetermined pattern for selectively covering the substrate; a first region of a second conductivity type formed in that area of the substrate which is defined by the insulation layer; a second region of the second conductivity type having a high impurity concentration and formed in the first region; a third region of the first conductivity type formed in the first region; and a polycrystalline silicon layer formed on the major surface of the substrate, said polycrystalline silicon layer comprising a first portion of the second conductivity type contacting the second region, a second portion of the first conductivity type contacting the third region and a third portion contacting the first region, said first and second portions having high impurity concentrations constituting first and second contacting electrodes, respectively, and the third portion having a low impurity concentration and constituting a separation portion for insulating the first and second portions from each other.
Claim 2
Dependent Claim
168 words
A semiconductor device comprising: a semiconductor substrate of a first conductivity type; an insulation layer of a predetermined pattern for selectively covering the substrate; a first region of a second conductivity type formed in that area of the substrate which is defined by the insulation layer; a second region of the second conductivity type having a high impurity concentration and formed in the first region; a third region of the first conductivity type formed in the first region; and a polycrystalline silicon layer formed on the major surface of the substrate, said polycrystalline silicon layer comprising a first portion of the second conductivity type contacting the second region, a second portion of the first conductivity type contacting the third region and a third portion contacting the first region, said first and second portions having high impurity concentrations constituting first and second contacting electrodes, respectively, and the third portion having a low impurity concentration and constituting a separation portion for insulating the first and second portions from each other.
Claim 3
Dependent Claim
22 words
A semiconductor device according to claim 1, wherein the first region has a sheet resistivity of about 300 Ω/□ to 2 KΩ/□.
Claim 4
Dependent Claim
46 words
A semiconductor device according to claim 1, wherein said first and second portions have sheet resistivites of about 100 Ω/□ to 500 Ω/□ and about 20 Ω/□ to 100 Ω/□, respectively, and said third portion has a sheet resistivity of about 5 KΩ/□ to 50 KΩ/□.
Claim 5
Dependent Claim
17 words
A semiconductor device according to claim 1, wherein said third portion is of the first conductivity type.
Claim 6
Dependent Claim
17 words
A semiconductor device according to claim 1, wherein the third portion is of the second conductivity type.