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US4439842A Expired / Lapsed US ⏱️ 0.0 years remaining

Bipolar transistor read only or read-write store with low impedance sense amplifier

Assignee: International Business Machines Corp
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Filing: 1981-08-06
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Granted: 1984-03-27
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Expires: 2001-08-06
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Abstract

Abstract In a bipolar transistor storage array, the single emitter terminal of each transistor is connected to a bit line. Each bit line is connected to a sense amplifier that provides a low impedance connection to a current source or voltage reference point. The low impedance circuit helps to provide fast switching for a write operation and a noise immune storage operation. The emitter connection and the sense amplifier construction simplify the conversion of the array or part of the array to a read only storage function.

Inventors

  • 👤 Sashi D. Malaviya

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 09:07
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/21; G11C11/34; G11C11/40; G11C11/41; G11C11/411; G11C11/4116; G11C17/00; G11C17/08

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 191 words
A data store of the type having bit lines and word lines and a semiconductor device located at cross over points of a word line and a bit line, wherein the semiconductor device comprises a single emitter bipolar transistor and means connecting the emitter terminal of the transistor to the associated bit line, and a plurality of current sensing circuits connected to conduct between the bit lines and a common point, said current sensing circuits having a low impedance in the circuit between said emitter terminals, wherein the improvement comprises, a first transistor and a second transistor in the current sensing circuit for each bit line each having an emitter terminal connected to a common current source, the current source providing a sufficiently high base current during a read operation to maintain said low impedance in the collector-emitter circuit of the first transistor, whereby the first and second transistors tend to have corresponding collector currents, means connecting the collector terminal of said first transistor to a bit line, and means connecting the collector terminal of said second transistor to signify the data storage state of a cell during a read operation.
Claim 2
Dependent Claim 191 words
A data store of the type having bit lines and word lines and a semiconductor device located at cross over points of a word line and a bit line, wherein the semiconductor device comprises a single emitter bipolar transistor and means connecting the emitter terminal of the transistor to the associated bit line, and a plurality of current sensing circuits connected to conduct between the bit lines and a common point, said current sensing circuits having a low impedance in the circuit between said emitter terminals, wherein the improvement comprises, a first transistor and a second transistor in the current sensing circuit for each bit line each having an emitter terminal connected to a common current source, the current source providing a sufficiently high base current during a read operation to maintain said low impedance in the collector-emitter circuit of the first transistor, whereby the first and second transistors tend to have corresponding collector currents, means connecting the collector terminal of said first transistor to a bit line, and means connecting the collector terminal of said second transistor to signify the data storage state of a cell during a read operation.
Claim 3
Dependent Claim 111 words
The data store defined in claim 1 having a read-write section and a read only section, and a semiconductor device located at cross over points of a word line and a bit line, pairs of some of said bipolar transistors being cross connected between their base and collector terminals to form a bistable read-write storage cell, the impedance of said current responsive circuits being sufficiently low to maintain substantially the voltage between a word line and said common point as a collector difference voltage for a cell in a data storage state, others of said semiconductor devices being arranged to function as diodes forming the read only section of the store.
Claim 4
Dependent Claim 385 words
A data store of the type having bit lines and word lines and a semiconductor device located at cross over points of a word line and a bit line, wherein the semiconductor device comprises a single emitter bipolar transistor and means connecting the emitter terminal of the tranistor to the associated bit line, and a plurality of current sensing circuits connected to conduct between the bit lines and a common point, said current sensing circuits having a low impedance in the circuit between said emitter terminals, pairs of some of said bipolar transistors being cross connected between their base and collector terminals to form a bistable storage cell, the impedance of said current responsive circuits being sufficiently low to maintain substantially the voltage between a word line and said common point as a collector difference voltage for a cell in a data storage state, others of said some connector devices being arranged to function as diodes forming a read only section of the store, the current sensing circuit comprising a first transistor and a second transistor each having an emitter terminal connected to said common point and having a base terminal connected to a common current source, whereby the first and second transistors tend to have corresponding collector currents, means connecting the collector terminal of said first transistor to a bit line, and means connecting the collector terminal of said second transistor to signify the data storage state of a cell during a read operation, pairs of said bipolar transistors being cross connected between their base and collector terminals to form a bistable storage cell and wherein the impedance of said current responsive circuits is sufficiently low to maintain substantially the voltage between a word line and said common point as a collector difference voltage for a cell in a data storage state, said current source providing a sufficiently high base current during a read operation to maintain said low impedance in the collector-emitter circuit of the first transistor, and means connecting the current source at said common point, the impedance of said current sensing circuits having a low value such that current division between the two bit lines of a bistable storage cell is established substantially by the binary storage stage of the cell and independent of the impedance of the current sensing circuits.
Claim 5
Dependent Claim 385 words
A data store of the type having bit lines and word lines and a semiconductor device located at cross over points of a word line and a bit line, wherein the semiconductor device comprises a single emitter bipolar transistor and means connecting the emitter terminal of the tranistor to the associated bit line, and a plurality of current sensing circuits connected to conduct between the bit lines and a common point, said current sensing circuits having a low impedance in the circuit between said emitter terminals, pairs of some of said bipolar transistors being cross connected between their base and collector terminals to form a bistable storage cell, the impedance of said current responsive circuits being sufficiently low to maintain substantially the voltage between a word line and said common point as a collector difference voltage for a cell in a data storage state, others of said some connector devices being arranged to function as diodes forming a read only section of the store, the current sensing circuit comprising a first transistor and a second transistor each having an emitter terminal connected to said common point and having a base terminal connected to a common current source, whereby the first and second transistors tend to have corresponding collector currents, means connecting the collector terminal of said first transistor to a bit line, and means connecting the collector terminal of said second transistor to signify the data storage state of a cell during a read operation, pairs of said bipolar transistors being cross connected between their base and collector terminals to form a bistable storage cell and wherein the impedance of said current responsive circuits is sufficiently low to maintain substantially the voltage between a word line and said common point as a collector difference voltage for a cell in a data storage state, said current source providing a sufficiently high base current during a read operation to maintain said low impedance in the collector-emitter circuit of the first transistor, and means connecting the current source at said common point, the impedance of said current sensing circuits having a low value such that current division between the two bit lines of a bistable storage cell is established substantially by the binary storage stage of the cell and independent of the impedance of the current sensing circuits.

References Cited (Backward Citations)

US3618052A Cited
US3909805A Cited
US3957008A Cited
US4078261A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1987-03-27 1987-09-26 1988-03-27 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1991-03-27 1991-09-26 1992-03-27 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1995-03-27 1995-09-26 1996-03-27 $7700.00 Window Closed / Lapsed

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