US3909805A
Expired / Lapsed
US
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Programmable read only memory
Assignee: Compagnie Internationale pour l'Informatique CII-Honeywell Bull SA
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Filing: 1974-04-30
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Granted: 1975-09-30
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Expires: 1994-04-30
Abstract
Abstract A programmable read-only memory including word lines and bit columns, wherein the columns (good conductors) are less resistive than the word lines (resistive conductors or bands) and wherein the programming is facilitated by the inclusion of one or more shunt paths which are good conductors and which are intended to channel programming current away from at least one of the word lines formed in a semiconductor substrate as a result of their being connected to these word lines or resistive bands via semiconductor structures, the conductive state of which can be controlled by applying a difference of potential between the word line and the bit column with which the memory element to be destroyed is associated.
Inventors
- 👤 Serge Auguste Touron
- 👤 Jean-Claude Duval
- 👤 Francis Mottini
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 11:52
CPC Classifications
G; G11; G11C; G11C17/00; G11C17/14; G11C17/16; H; H10; H10B; H10B69/00; Y; Y10; Y10S; Y10S148/00; Y10S148/055
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
172 words
A programmable read-only memory of the type which is produced in intEgrated circuit form from a semiconductor substrate and of which the matrix network, comprising word lines and bit columns which make up the said matrix, is formed by straight mutually parallel, resistive semiconductor bands of a type having specific conductive characteristics which are formed in the said substrate, and by mutually parallel wires which are good conductors which are applied to the substrate via an insulating layer and which intersect the said bands at intersections which possess destructible memory elements which connect a band to a wire, characterized in that it includes means for programming it, said means comprising shunt paths which are good conductors and which are intended to channel the programming current away from at least one of the said bands, the paths being connected to the bands by semiconductor structures the conductive state of which can be controlled by applying a difference of potential between the wire and band to which the memory element to be destroyed corresponds.
Claim 2
Dependent Claim
172 words
A programmable read-only memory of the type which is produced in intEgrated circuit form from a semiconductor substrate and of which the matrix network, comprising word lines and bit columns which make up the said matrix, is formed by straight mutually parallel, resistive semiconductor bands of a type having specific conductive characteristics which are formed in the said substrate, and by mutually parallel wires which are good conductors which are applied to the substrate via an insulating layer and which intersect the said bands at intersections which possess destructible memory elements which connect a band to a wire, characterized in that it includes means for programming it, said means comprising shunt paths which are good conductors and which are intended to channel the programming current away from at least one of the said bands, the paths being connected to the bands by semiconductor structures the conductive state of which can be controlled by applying a difference of potential between the wire and band to which the memory element to be destroyed corresponds.
Claim 3
Dependent Claim
37 words
A memory according to claim 1, characterized in that the said shunt paths are parallel to the said wires, these wires being applied to the said substrate in the same way and formed from the same material.
Claim 4
Dependent Claim
17 words
a plurality of semiconductor means, coupled at said intersection between said word lines and bit columns, and
Claim 5
Dependent Claim
17 words
a plurality of semiconductor means, coupled at said intersection between said word lines and bit columns, and
Claim 6
Dependent Claim
67 words
means for applying a difference of potential to at least one of said intersections between said worD line and said bit column to which a memory element is formed by said intersection and which corresponds to the memory element to be destroyed, said difference of potential coupled to cause the respective one of said semiconductor means to conduct thereby destroying the associated one of said memory elements.
Claim 7
Dependent Claim
67 words
means for applying a difference of potential to at least one of said intersections between said worD line and said bit column to which a memory element is formed by said intersection and which corresponds to the memory element to be destroyed, said difference of potential coupled to cause the respective one of said semiconductor means to conduct thereby destroying the associated one of said memory elements.
Claim 8
Dependent Claim
20 words
A memory according to claim 1, characterized in that the said controlled-conduction semiconductor structures are arranged within the said bands.
Claim 9
Dependent Claim
35 words
A memory according to claim 1, characterized in that the said semiconductor structures are structures containing four superimposed layers of alternating conductivity types which have a control layer forming the gate of the said structure.
Claim 10
Dependent Claim
35 words
A memory according to claim 4, characterized in that the layer forming the gate of the said semiconductor structure consists of the doped substance of the specific type from which the said bands are formed.
Claim 11
Dependent Claim
19 words
A memory according to claim 5, characterized in that the said semiconductor structure is controlled by the anode grid.
Claim 12
Dependent Claim
19 words
A memory according to claim 5, characterized in that the said semiconductor structure is controlled by the cathode grid.
Claim 13
Dependent Claim
60 words
A memory according to claim 1, characterized in that the said destructible element is a fusible member and is connected to the material of which the appropriate band is formed via a layer of material the conductivity type of which is opposite from the said specific type, the layer being formed in the substance of which the said band consists.
Claim 14
Dependent Claim
64 words
A memory according to claim 1, characterized in that the said destructible element is a diode which is formed, in the material of which the said resistive bands consist, by two semiconductor layers of opposite conductivity types one of which is connected to one of the said wires, while the other layer forms one of the four layers of the said controlled-conduction semiconductor structure.
Claim 15
Dependent Claim
31 words
A memory according to claim 1, characterized in that the said resistive bands and the said conductor wires form the word lines and the bit columns of the said memory respectively.
Claim 16
Dependent Claim
31 words
A memory according to claim 1, characterized in that the said conductor wires and the said resistive bands form the word lines and the bit columns of the said memory respectively.
Claim 17
Dependent Claim
56 words
A programmable read-only memory comprising: A. a plurality of substantially parallel bit columns, each of said columns including a good conductor which is low in resistance; B. a plurality of substantially parallel word lines traversing said bit columns to form intersections, each of said lines including a resistive conductor; C. means for programming said memory including
Claim 18
Dependent Claim
56 words
A programmable read-only memory comprising: A. a plurality of substantially parallel bit columns, each of said columns including a good conductor which is low in resistance; B. a plurality of substantially parallel word lines traversing said bit columns to form intersections, each of said lines including a resistive conductor; C. means for programming said memory including
Claim 19
Dependent Claim
54 words
A memory according to claim 12, wherein said semiconductor means are thyristor type devices having an anode, cathode and gate electrode, said gate electrode coupled with the respective one of said word lines, and said anode and cathode electrodes coupled between the respective one of said bit columns and one of said shunt paths.
Claim 20
Dependent Claim
79 words
A memory according to claim 13, further comprising a destructible element coupled in the coupling between said anode electrode and said respective one of said bit columns, whereby said programming current operates to destroy said destructible element thereby destroyiing the memory element associated with such destroyed destructible element, such that a destroyed memory element is representative of a first stored state and such that a memory element which has not been destroyed is representative of a second stored state.
Claim 21
Dependent Claim
26 words
A memory according to claim 14, wherein each of said destructible elements includes a fusible member, said fusible member open-circuited in response to said programming current.
Claim 22
Dependent Claim
26 words
A memory according to claim 14, wherein each of said destructible elements include a diode element, said diode element short-circuited in response to said programming current.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-09-29 | 1979-03-31 | 1979-09-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-09-29 | 1983-03-31 | 1983-09-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-09-29 | 1987-03-31 | 1987-09-30 | $7700.00 | Window Closed / Lapsed |