US4438503A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Waveform synthesizers
Assignee: UK Secretary of State for Industry
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Filing: 1981-05-13
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Granted: 1984-03-20
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Expires: 2001-05-13
Abstract
Abstract The invention facilitates the calibration of VOR equipment by synthesis of series of waveforms representative of different positions in azimuth. Digital data representative of a frequency modulated component of the VOR waveform is stored in a first memory area (1) and digital data representative of an added sine wave component of the waveform is stored in a second memory area (2). By appropriate cyclic data retrieval from the memory areas and combination of the data (7) together with digital to analogue conversion (8) and filtering (10) the VOR waveform corresponding to a particular azimuth may be synthesized.
Inventors
- 👤 Robert A. White
- 👤 Ralph W. Yell
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 09:28
CPC Classifications
G; G06; G06F; G06F1/00; G06F1/02; G06F1/03; G06F1/035; G06F1/0356; G01; G01S; G01S1/00; G01S1/02; G01S1/022; G01S1/026; G06F2101/00; G06F2101/04
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
173 words
A waveform synthesizer for calibrating VOR equipment, comprising: a memory having first and second separately addressable areas, the first area having digital data stored therein representing a frequency modulated component of a standard VOR waveform and the second area having digital data stored therein representing an added sine wave component of a standard VOR waveform; azimuth selector means, adapted to be manipulated by an operator, for selecting an azimuth to be simulated by said synthesizer; a cyclic memory addressor, coupled to said azimuth selector means and to said memory, for (a) addressing the first and second memory areas, the address of the second area being offset by an amount related to the azimuth selected via said azimuth selector means and (b) providing digital data read from said first and second memory areas defining a waveform to be synthesized; converter means, coupled to said cyclic memory addressor, for converting said digital data read from said first and second memory areas into an analog signal of a form suitable for coupling to said VOR equipment.
Claim 2
Dependent Claim
173 words
A waveform synthesizer for calibrating VOR equipment, comprising: a memory having first and second separately addressable areas, the first area having digital data stored therein representing a frequency modulated component of a standard VOR waveform and the second area having digital data stored therein representing an added sine wave component of a standard VOR waveform; azimuth selector means, adapted to be manipulated by an operator, for selecting an azimuth to be simulated by said synthesizer; a cyclic memory addressor, coupled to said azimuth selector means and to said memory, for (a) addressing the first and second memory areas, the address of the second area being offset by an amount related to the azimuth selected via said azimuth selector means and (b) providing digital data read from said first and second memory areas defining a waveform to be synthesized; converter means, coupled to said cyclic memory addressor, for converting said digital data read from said first and second memory areas into an analog signal of a form suitable for coupling to said VOR equipment.
Claim 3
Dependent Claim
37 words
A waveform synthesizer according to claim 1 wherein said converter means comprises means for digitally combining data read from said first and second memory areas to form combined digital data which is then converted into analog form.
Claim 4
Dependent Claim
46 words
A waveform synthesizer according to claim 1 wherein said converter mean comprises: means for digitally combining data read from said first and second memory areas; means for analog converting the combined data; and means for filtering the analog converted combined data to form the synthesized waveform.
Claim 5
Dependent Claim
18 words
A waveform synthesizer according to claim 1 wherein said first memory area is a Read Only Memory (ROM).
Claim 6
Dependent Claim
18 words
A waveform synthesizer according to claim 4 wherein said second memory area is a Read Only Memory (ROM).
Claim 7
Dependent Claim
18 words
A waveform synthesizer according to claim 1 wherein said second memory area is a Read Only Memory (ROM).
Claim 8
Dependent Claim
23 words
A waveform synthesizer according to claim 1 wherein said azimuth selector means comprises a plurality of switches coupled to said cyclic memory addressor.
Claim 9
Dependent Claim
84 words
A waveform synthesizer according to claim 1 wherein said cyclic memory addressor comprises: a cyclic address generator for generating a stream of addresses; means for coupling said stream of addresses to said first memory area; modifying means, coupled to said cyclic address generator and to said azimuth selector means, for modifying the address stream in accordance with the azimuth specified by said azimuth selector means and generating a modified address stream; and means for coupling said modified address stream to said second memory area.
Claim 10
Dependent Claim
117 words
A waveform synthesizer according to claim 1 wherein said converter means comprises: a binary adder for adding data read from said first memory area to provide first memory binary data and for adding data read from said second memory area to provide second memory binary data; a latch for latching said first memory binary data and said second memory binary data from said binary adder; a combiner, coupled to said latch, for combining said first and second memory binary data to provide combined digital data; a digital to analog (D/A) converter for converting combined digital data from said combiner into an analog form; and a filter for smoothing an analog form signal provided by said D/A converter.
Claim 11
Dependent Claim
79 words
A waveform synthesizer according to claim 1 wherein said converter means comprises: a first latch for latching data read from said first memory area; a first digital/analog (D/A) converter for analog converting data latched by said first latch; a second latch for latching data from said second memory area; a second digital/analog (D/A) converter for analog converting data latched by said second latch; and an adder for combining the analog converted data from said first and second D/A converters.
Claim 12
Independent Claim
109 words
A method of waveform synthesis, for use in calibrating VOR equipment comprising the steps of: storing in a first memory area digital data representative of a frequency modulated component of a standard VOR waveform, and in a second memory area digital data representative of an added sine wave component of the standard VOR waveform; addressing said first and second memory areas in a cyclic fashion and in accordance with a desired azimuth to be incorporated into the synthesized waveform; and combining data read from said first and second memory areas in accordance with said addressing step and generating therefrom an analog waveform suitable for connection to a VOR equipment.
Claim 13
Independent Claim
109 words
A method of waveform synthesis, for use in calibrating VOR equipment comprising the steps of: storing in a first memory area digital data representative of a frequency modulated component of a standard VOR waveform, and in a second memory area digital data representative of an added sine wave component of the standard VOR waveform; addressing said first and second memory areas in a cyclic fashion and in accordance with a desired azimuth to be incorporated into the synthesized waveform; and combining data read from said first and second memory areas in accordance with said addressing step and generating therefrom an analog waveform suitable for connection to a VOR equipment.
Claim 14
Dependent Claim
37 words
A method according to claim 11 wherein the combining step comprises the steps of reading digital data from said memory areas, digitally combining the read digital data and then converting the combined digital data into analog form.
Claim 15
Dependent Claim
37 words
A method according to claim 11 in which the combining step comprises the steps of converting digital data read from each memory area into analog form, and then combining the analog forms into a single synthesized waveform.
Claim 16
Dependent Claim
23 words
A method according to claim 11 further including the steps of buffering and amplifying the analog waveform before connection to the VOR equipment.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1987-03-20 | 1987-09-19 | 1988-03-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1991-03-20 | 1991-09-19 | 1992-03-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1995-03-20 | 1995-09-19 | 1996-03-20 | $7700.00 | Window Closed / Lapsed |