US3822380A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Digitally controlled signal generator
Assignee: General Dynamics Corp
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Filing: 1973-05-25
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Granted: 1974-07-02
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Expires: 1993-05-25
Abstract
Abstract A complex waveform synthesizer includes a main memory unit consisting of recirculating shift registers which store a large number of digital words which are loaded into the main memory from a central processing unit to generate selected functions which are represented by analog signals after conversion in a digital to analog converter. The variations of the signal from the converter as a function of time are determined by the rate at which digital signals from an idle memory are applied to the main memory to readout the digital words stored therein to the digital to analog converter on a repetitive basis. The idle memory consists of a recirculating shift register which may also be loaded by the computer. The rate at which the digital signals are shifted out of the idle memory is determined by a digital frequency synthesizer which also may be programmed by the computer.
Inventors
- 👤 J Forgione
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 19:04
CPC Classifications
G; G06; G06F; G06F1/00; G06F1/02; G06F1/03; G06F1/0321; G06F1/0328
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
109 words
A function generator system which produces an output signal which is a digitally selected function of time, said system comprising: a. first memory means having storage for a plurality of digital words each representing a segmental value of said output signals, b. second memory means having storage for a plurality of digital signals each representing the presence and absence of a different one of said segmental value at different intervals of time, and c. means for reading said digital words successively out of said first memory under control of successive ones of digital signals in said second memory means to provide said output signal from said first memory means.
Claim 2
Dependent Claim
109 words
A function generator system which produces an output signal which is a digitally selected function of time, said system comprising: a. first memory means having storage for a plurality of digital words each representing a segmental value of said output signals, b. second memory means having storage for a plurality of digital signals each representing the presence and absence of a different one of said segmental value at different intervals of time, and c. means for reading said digital words successively out of said first memory under control of successive ones of digital signals in said second memory means to provide said output signal from said first memory means.
Claim 3
Dependent Claim
41 words
The invention as set forth in claim 1 further comprising a digital to analog converter, said readout means being operative to read said digital words from said first memory into said converter to produce said output signal as an analog signal.
Claim 4
Dependent Claim
40 words
The invention as set forth in claim 1 further comprising means for selectively providing signals having different frequencies corresponding to the frequency of said output signal, and means operated by said last named signals for reading out said second memory.
Claim 5
Dependent Claim
54 words
The invention as set forth in claim 1 including a central processing unit for generating said digital words and a further digital word consisting of said plurality of digital signals, and means for loading said first named digital words into said first memory means and said further digital word into said second memory means.
Claim 6
Dependent Claim
40 words
The invention as set forth in claim 4 including a source of reference frequency signals, and means for applying said reference frequency signals to said second memory for controlling the rate of said successive digital signals which are provided therefrom.
Claim 7
Dependent Claim
59 words
The invention as set forth in claim 5 wherein said first means includes first recirculating shift registers, said first-named digital words being stored serially in said registers, aNd wherein said reading out means includes means for applying said digital signals of said further word to said recirculating registers for shifting said first named words successively out of said registers.
Claim 8
Dependent Claim
61 words
The invention as set forth in claim 6 wherein said second memory is a second recirculating shift register, wherein said digital signals of which said further digital word consists are stored serially, and wherein said reference signal applying means includes means for applying said reference signals to said second register for shifting said digital signals successively out of said second register.
Claim 9
Dependent Claim
56 words
The invention as set forth in claim 7 wherein said loading means includes means for inhibiting the recirculation of said digital words in said first shift registers and in said second shift register, and means for serially shifting said first-named digital words and said further digital word into said first registers and said second register respectively.
Claim 10
Dependent Claim
56 words
The invention as set forth in claim 8 wherein said reference frequency signal source is a digital frequency synthesizer for providing said reference signals at frequencies corresponding to the value of a third digital word which is applied thereto, and means for applying said third word to said digital frequency synthesizer from said central processing unit.
Claim 11
Dependent Claim
35 words
The invention as set forth in claim 9 further comprising a digital to analog converter for converting said digital words shifted out of said first recirculating shift registers into said output signal in analog form.
Claim 12
Dependent Claim
39 words
The invention as set forth in claim 10 further comprising a filter connected to the output of said converter for filtering said output signal, and means operated by said central processing unit for selecting the bandwidth of said filter.
Claim 13
Dependent Claim
46 words
The invention as set forth in claim 10 further comprising an attenuator connected to the output of said converter for changing the amplitude of said output signal, and means operated by said central processing unit for selecting the resistance presented to said signal by said attenuator.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-07-01 | 1977-12-31 | 1978-07-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-07-01 | 1981-12-31 | 1982-07-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-07-01 | 1985-12-31 | 1986-07-02 | $7700.00 | Window Closed / Lapsed |