US4435687A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Clock signal recovery circuit
Assignee: Philips North America LLC
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Filing: 1981-01-26
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Granted: 1984-03-06
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Expires: 2001-01-26
Abstract
Abstract An absolute differentiator receives a self-clocking digital input signal, and its output is applied to a series of delay elements. The outputs of the differentiator and the delay elements are coupled to an OR-gate. The output of the OR-gate is applied to a phase-locked loop to produce a recovered clock signal. The delay elements can be variable with a delay controlled by an output signal from the phase-locked loop, to thereby track a varying center frequency of the digital input signal.
Inventors
- 👤 Joseph S. Nadan
- 👤 II George C. Kenney
- 👤 Marino G. Carasso
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 16:52
CPC Classifications
H; H04; H04L; H04L7/00; H04L7/0054; H04L7/0066; H04L7/02; H04L7/027; H04L7/033
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
55 words
A method of recovering a clock signal from a self-clocking digital signal comprising absolute differentiating said digital signal; time delaying said differentiated signal through a plurality of serially coupled delay elements, and providing an output clock signal upon an output from the combined outputs of each of said delay elements and said absolute differentiated signal.
Claim 2
Independent Claim
55 words
A method of recovering a clock signal from a self-clocking digital signal comprising absolute differentiating said digital signal; time delaying said differentiated signal through a plurality of serially coupled delay elements, and providing an output clock signal upon an output from the combined outputs of each of said delay elements and said absolute differentiated signal.
Claim 3
Dependent Claim
21 words
A method as claimed in claim 1, further comprising synchronizing a phase-locked loop by the use of said output clock signal.
Claim 4
Dependent Claim
25 words
A method as claimed in claim 2, further comprising changing the delay of said delay elements in accordance with a signal from said phase-locked loop.
Claim 5
Dependent Claim
82 words
A circuit for providing a clock signal from a self-clocking digital signal, said circuit comprising an absolute differentiator having an input means for receiving said digital signal and an output, a plurality of serially coupled delay elements, a first one of said delay elements being coupled to said absolute differentiator output, and an OR-gate coupled collectively to an output of each of said delay elements and to said absolute differentiator output, said OR-gate having an output means for providing the clock signal.
Claim 6
Dependent Claim
82 words
A circuit for providing a clock signal from a self-clocking digital signal, said circuit comprising an absolute differentiator having an input means for receiving said digital signal and an output, a plurality of serially coupled delay elements, a first one of said delay elements being coupled to said absolute differentiator output, and an OR-gate coupled collectively to an output of each of said delay elements and to said absolute differentiator output, said OR-gate having an output means for providing the clock signal.
Claim 7
Dependent Claim
18 words
A circuit as claimed in claim 4, further comprising a phase-locked loop coupled to said OR-gate output means.
Claim 8
Dependent Claim
47 words
A circuit as claimed in claim 5, wherein said delay elements include input means for varying the amount of delay, and wherein said circuit further comprises means for applying a signal from said phase-locked loop to said input means for controlling the delay of said delay elements.
Claim 9
Dependent Claim
15 words
A circuit as claimed in claim 6, wherein said applying means comprises a low-pass filter.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1987-03-06 | 1987-09-05 | 1988-03-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1991-03-06 | 1991-09-05 | 1992-03-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1995-03-06 | 1995-09-05 | 1996-03-06 | $7700.00 | Window Closed / Lapsed |