Abstract A time-divisional phase synchronizing apparatus is provided using a phase lock loop for a time-divisional multiple signal of burst mode including signals from a plurality of stations. A memory means is provided in the phase lock loop to separately store phase information of the signals of respective stations in each frame of the time-divisional multiple signal of burst mode, and a phase shifter is connected in the phase lock loop to time divisionally control the phase position of the output of an oscillator. The oscillator generates a stable frequency signal substantially equal to the frequency signal of the multiple signal in accordance with the contents of the memory means so that reference waves to be applied to detect the signals of respective stations can be derived from the phase lock loop.
Inventors
👤 Akira Ogawa
👤 Takuro Muratani
👤 Kunishi Nosaka
Bibliographic Details
Application Number—
JurisdictionUS
Data Sourcegoogle_patents
Last Synchronized2026-10-23 00:58
CPC Classifications
H; H04; H04J; H04J3/00; H04J3/02
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
212 words
A time-divisional phase synchronizing apparatus for a timedivisional multiple signal of burst mode including signals of a plurality of stations, comprising: a standard oscillator operative to generate a continuous wave having a stable frequency substantially equal to the frequency of the time-divisional multiple signal of burst mode; a phase lock loop comprising a phase detector, memory means and a phase shifter; input means for applying the time-divisional multiple signal of burst mode to the phase detector; the phase shifter controlling time divisionally the phase position of the output of the standard oscillator in accordance with the contents of the memory means; the phase detector producing time divisionally outputs having levels respectively proportional to the absolute values of differences between the respective phase positions of the timedivisional outputs of the phase shifter and the respective phase positions of the signals of stations and having the polarities corresponding respectively to signs of said differences; the memory means storing separately, by the use of the timedivisional outputs of the phase detector, phase information of the signals of respective stations in each frame of the timedivisional multiple signal of burst mode; and output means coupled with the phase lock loop to derive time divisionally reference waves to be applied to detect the signals of respective stations.
Claim 2
Dependent Claim
212 words
A time-divisional phase synchronizing apparatus for a timedivisional multiple signal of burst mode including signals of a plurality of stations, comprising: a standard oscillator operative to generate a continuous wave having a stable frequency substantially equal to the frequency of the time-divisional multiple signal of burst mode; a phase lock loop comprising a phase detector, memory means and a phase shifter; input means for applying the time-divisional multiple signal of burst mode to the phase detector; the phase shifter controlling time divisionally the phase position of the output of the standard oscillator in accordance with the contents of the memory means; the phase detector producing time divisionally outputs having levels respectively proportional to the absolute values of differences between the respective phase positions of the timedivisional outputs of the phase shifter and the respective phase positions of the signals of stations and having the polarities corresponding respectively to signs of said differences; the memory means storing separately, by the use of the timedivisional outputs of the phase detector, phase information of the signals of respective stations in each frame of the timedivisional multiple signal of burst mode; and output means coupled with the phase lock loop to derive time divisionally reference waves to be applied to detect the signals of respective stations.
Claim 3
Dependent Claim
28 words
An apparatus according to claim 1, in which the memory means comprises a plurality of memories each storing the time-divisional outputs of the phase detector as analogue information.
Claim 4
Dependent Claim
42 words
An apparatus according to claim 1, in which the memory means comprises a plurality of memories each storing the time-divisional outputs of the phase detector as digital information, and means for digitally controlling said phase shifter in accordance with said digital information.