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US4435684A Expired / Lapsed US ⏱️ 0.0 years remaining

Video amplifier mute circuit

Assignee: National Semiconductor Corp
•
Filing: 1982-04-09
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Granted: 1984-03-06
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Expires: 2002-04-09
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Abstract

Abstract A wide bandwidth amplifier is shown along with a muting circuit. The output shift between normal operation and mute is kept very small. The amplifier is useful in video disk and audio signal reproduction.

Inventors

  • 👤 Ronald W. Page

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 07:11
CPC Classifications
H; H03; H03G; H03G3/00; H03G3/20; H03G3/30; H03G3/34; H03F; H03F3/00; H03F3/181; H03F3/183; H03F3/45; H03F3/45071

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 123 words
A wide bandwidth amplifier circuit which includes a high gain amplifier capable of being muted in response to a muting signal without changing its d-c output level, said circuit comprising: a differential amplifier having a source of tail current, an inverting input terminal, a noninverting input terminal, and an output; means for returning said noninverting input to a source of constant bias potential; means for coupling said inverting input to a source of signal to be amplified; means for shunting said tail current around said differential amplifier in response to said muting signal; and means for clamping said output to a d-c level, equal to the normal output level of said differential amplifier in its active state, in response to said muting signal.
Claim 2
Dependent Claim 123 words
A wide bandwidth amplifier circuit which includes a high gain amplifier capable of being muted in response to a muting signal without changing its d-c output level, said circuit comprising: a differential amplifier having a source of tail current, an inverting input terminal, a noninverting input terminal, and an output; means for returning said noninverting input to a source of constant bias potential; means for coupling said inverting input to a source of signal to be amplified; means for shunting said tail current around said differential amplifier in response to said muting signal; and means for clamping said output to a d-c level, equal to the normal output level of said differential amplifier in its active state, in response to said muting signal.
Claim 3
Dependent Claim 30 words
The amplifier circuit of claim 1 wherein said source of constant bias includes a Zener diode biased into reverse breakdown and said means for clamping includes a matched Zener diode.
Claim 4
Dependent Claim 52 words
The amplifier circuit of claim 2 wherein said differential amplifier includes a cascaded emitter follower directly coupled to its output to provide a low impedance, signal output source and a low pass filter coupled between said emitter follower output and said inverting input whereby the operating bias of said circuit is stabilized.
Claim 5
Dependent Claim 50 words
The amplifier circuit of claim 2 wherein said means for clamping further includes a transistor that is turned on in response to said muting signal and is biased to develop a voltage drop when turned on that is equal to the base to emitter voltage drop of a conducting transistor.

References Cited (Backward Citations)

US4366442A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1987-03-06 1987-09-05 1988-03-06 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1991-03-06 1991-09-05 1992-03-06 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1995-03-06 1995-09-05 1996-03-06 $7700.00 Window Closed / Lapsed

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