US4366442A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Amplifier with muting circuit
Assignee: Toshiba Corp
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Filing: 1980-09-10
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Granted: 1982-12-28
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Expires: 2000-09-10
Abstract
Abstract An amplifier is disclosed having a differential amplifier circuit, a current mirror circuit, a bias circuit and first and second single ended push-pull (SEPP) circuits connected in parallel to each other between a power source and earth. The first SEPP circuit includes a pair of diode-connected complementary transistors whose emitters are connected together and connected to the amplifier circuit. The second SEPP circuit includes a pair of diode-connected complementary transistors whose emitters are electrically insulated from those of the first SEPP circuit and connected to an output terminal of the amplifier. When a muting switch is opened, the supply of currents to the bias circuit is shut off, causing the first and second SEPP circuits to become unactuated and thereby attenuating an output signal from the output terminal of the amplifier.
Inventors
- 👤 Hisashi Yamada
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 13:17
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/30; H03F3/3069; H03F1/00; H03F1/30; H03F1/305; H03F3/72
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
235 words
An amplifier comprising: (a) an amplifier circuit having an input to which an electrical input signal is supplied and an output; (b) a current mirror circuit having an input connected to the output of said amplifier circuit and an output; (c) a single ended push-pull means, formed of a plurality of single ended push-pull circuits including at least first and second single ended push-pull circuits connected in parallel to each other, for amplifying said electrical input signal, said first single ended push-pull circuit being formed on a pair of diode-connected complementary transistors having emitter electrodes which are connected to each other and which are connected to said amplifier circuit, and said second single ended push-pull circuit being formed of a pair of diode-connected complementary transistors having emitter electrodes which are connected to each other, which are electrically insulated from the emitter electrodes of said first single ended push-pull circuit and which are connected to an output terminal from which an output electrical signal is generated; (d) bias circuit means, connected between said current mirror circuit and said single ended push-pull means, for supplying bias to said single ended push-pull means; and (e) muting means, connected at least to said bias circuit and including a muting switch, for stopping the supply of current at least to said bias circuit means in response to the switching operation of said muting switch, thereby muting the output electrical signal.
Claim 2
Dependent Claim
235 words
An amplifier comprising: (a) an amplifier circuit having an input to which an electrical input signal is supplied and an output; (b) a current mirror circuit having an input connected to the output of said amplifier circuit and an output; (c) a single ended push-pull means, formed of a plurality of single ended push-pull circuits including at least first and second single ended push-pull circuits connected in parallel to each other, for amplifying said electrical input signal, said first single ended push-pull circuit being formed on a pair of diode-connected complementary transistors having emitter electrodes which are connected to each other and which are connected to said amplifier circuit, and said second single ended push-pull circuit being formed of a pair of diode-connected complementary transistors having emitter electrodes which are connected to each other, which are electrically insulated from the emitter electrodes of said first single ended push-pull circuit and which are connected to an output terminal from which an output electrical signal is generated; (d) bias circuit means, connected between said current mirror circuit and said single ended push-pull means, for supplying bias to said single ended push-pull means; and (e) muting means, connected at least to said bias circuit and including a muting switch, for stopping the supply of current at least to said bias circuit means in response to the switching operation of said muting switch, thereby muting the output electrical signal.
Claim 3
Dependent Claim
57 words
An amplifier according to claim 1, wherein said amplifier circuit is formed of a differential pair of transistors having the same conductivity type, a first transistor having a base electrode to which a predetermined voltage is supplied and the second transistor having a base electrode connected to said input to which the electrical input signal is supplied.
Claim 4
Dependent Claim
39 words
An amplifier according to claim 2, wherein the emitter electrodes of the transistors of said first single ended push-pull circuit are connected through at least one resistor to said base electrode of said second transistor of said amplifier circuit.
Claim 5
Dependent Claim
39 words
An amplifier according to claim 2, wherein the emitter electrodes of the transistors of said first single ended push-pull circuit are connected through at least one resistor to the base electrode of the first transistor of said amplifier circuit.
Claim 6
Dependent Claim
49 words
An amplifier according to claim 2, further comprising a voltage source means, connected to the base electrode of said first transistor of said amplifier circuit and the output terminal, for supplying reference voltage having a predetermined voltage to the base electrode of said first transistor and the output terminal.
Claim 7
Dependent Claim
37 words
An amplifier according to claim 1, wherein said muting means includes means connected to said amplifier circuit for stopping the supply of current to said amplifier circuit in response to the switching operation of said muting switch.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1985-12-27 | 1986-06-28 | 1986-12-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1989-12-27 | 1990-06-28 | 1990-12-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1993-12-27 | 1994-06-28 | 1994-12-28 | $7700.00 | Window Closed / Lapsed |