Patent US4420031A successfully refreshed from Google Patents.
Patent US4426689A successfully refreshed from Google Patents.
US4426689A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Vertical semiconductor integrated circuit chip packaging
Assignee: International Business Machines Corp
•
Filing: 1980-11-28
•
Granted: 1984-01-17
•
Expires: 2000-11-28
Abstract
Abstract A semiconductor chip is so designed that the signal and power terminals are brought to one edge of the integrated circuit chip. The integrated circuit chip is then mounted vertically on a substrate which provides signal interconnection and power distribution to the integrated circuit chips as well as a thermal path for conducting heat away from the chips. The electrical connection from the semiconductor chip to the substrate may be by solder reflow or thermal compression bonding techniques. The package is particularly advantageous for memory integrated circuit chips. The vertical integrated circuit chips may alternatively be carried by a tape carrier which is formed into a convoluted form with all integrated circuit chips positioned substantially vertically thereon. This carrier is then bonded electrically and physically to a substrate in areas associated with the integrated circuit chips so that when the substrate is substantially horizontal the integrated circuit chips are substantially vertical in relation thereto. In this alternative, electrical connections may be made to more than one edges of the integrated circuit chips.
Inventors
- 👤 Robert A. Henle
- 👤 Alfred H. Johnson
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 08:05
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/60; H10W70/611; H10W70/67; H10W70/688; H10W70/69; H10W72/00; H10W72/071; H10W72/072; H10W72/07231; H10W72/07236; H10W72/20; H10W72/251; H10W72/252
Claims Analysis
Total Claims: 21
Claim 1
Independent Claim
83 words
A vertical semiconductor chip package comprising: a substrate; a semiconductor integrated circuit chip having two major faces and four edges with its signal and power terminals located on one edge of the chip; and said semiconductor chip is electrically and physically connected to said substrate at said one edge of said chip by suitable physical connections to electrical paths on or in said substrate for signal interconnection and power distribution to and from the semiconductor chip, and for physical support of the chip.
Claim 2
Dependent Claim
83 words
A vertical semiconductor chip package comprising: a substrate; a semiconductor integrated circuit chip having two major faces and four edges with its signal and power terminals located on one edge of the chip; and said semiconductor chip is electrically and physically connected to said substrate at said one edge of said chip by suitable physical connections to electrical paths on or in said substrate for signal interconnection and power distribution to and from the semiconductor chip, and for physical support of the chip.
Claim 3
Dependent Claim
25 words
The vertical package of claim 1 wherein said electrical and physical connections to said electrical paths on or in said substrate is by solder connections.
Claim 4
Dependent Claim
26 words
The vertical package of claim 1 wherein said electrical and physical connections to said electrical paths on or in said substrate is by thermal compression bonding.
Claim 5
Dependent Claim
29 words
The vertical package of claim 1 wherein said semiconductor chip is physically supported by means other than said electrical and physical connections at one edge of said semiconductor chip.
Claim 6
Dependent Claim
33 words
The vertical package of claim 4 wherein the said support means other than the connections at one edge of said semiconductor chip is a support frame holding said chip at its side edges.
Claim 7
Dependent Claim
39 words
The vertical package of claim 1 wherein said integrated circuit chip contains memory circuitry in and on at least one of said major surfaces and having the longest length of the memory array area parallel to said one edge.
Claim 8
Dependent Claim
23 words
The vertical package of claim 1 wherin said semiconductor chip contains integrated circuits on and in said both major surfaces of said chip.
Claim 9
Dependent Claim
109 words
A vertical semiconductor chip package comprising: a substrate; a plurality of integrated circuit chips bonded to a tape carrier; said tape carrier being in a convoluted form with all said integrated circuit chips positioned substantially vertical; said tape carrier being electrically and physically bonded to said substrate in areas associated with said integrated circuit chips so that said substrate is substantailly horizontal with respect to said vertical positioned integrated circuit chips; and each of said plurality of chips is located within an opening in said tape carrier with metal leads physically and electrically connected to the said chips across the said opening between said chip and said tape carrier.
Claim 10
Dependent Claim
109 words
A vertical semiconductor chip package comprising: a substrate; a plurality of integrated circuit chips bonded to a tape carrier; said tape carrier being in a convoluted form with all said integrated circuit chips positioned substantially vertical; said tape carrier being electrically and physically bonded to said substrate in areas associated with said integrated circuit chips so that said substrate is substantailly horizontal with respect to said vertical positioned integrated circuit chips; and each of said plurality of chips is located within an opening in said tape carrier with metal leads physically and electrically connected to the said chips across the said opening between said chip and said tape carrier.
Claim 11
Dependent Claim
19 words
The vertical package of claim 8 wherein said electrical and physical bonds to said substrate are thermal compression bonds.
Claim 12
Dependent Claim
33 words
The vertical package of claim 8 wherein metal leads physically and electrically connect one of said plurality of chips with others of said plurality of chips by leads on the said tape carrier.
Claim 13
Dependent Claim
27 words
The vertical package of claim 8 wherein said metal leads act as electrical connections to said chip on more than one of the sides of said chip.
Claim 14
Dependent Claim
41 words
The vertical package of claim 8 wherein a comb-shaped support frame having teeth holds said convoluted tape carrier to said substrate by means of the said teeth of said comb-shaped support against portions of the said tape carrier touching said substrate.
Claim 15
Dependent Claim
236 words
A vertical semiconductor chip package comprising: a substrate; a tape carrier with semiconductor chips located in openings in said carrier and physically and electrically attached to lead frame conductors which are carried on said carrier and are thermo compression bonded to said chips; said tape carrier is in a convoluted form of a recurring fold structure; said recurring structure includes a lower horizontal region, first and second vertical regions and a higher horizontal region; said regions are connected to one another with the said lower region being connected to and perpendicular to said first vertical region, said first vertical region being connected to and perpendicular to said higher horizontal region on the opposite side to said lower horizontal region, the said higher region being connected to and perpendicular to said second vertical region on the opposite side to said first vertical region, said first and second vertical regions are parallel to one another, and said second vertical region being connected to and perpendicular to the lower horizontal region in the next said recurring structure on the side opposite to said higher region; at least one of said first and second vertical regions carry a semiconductor chip therein; and said tape carrier of said recurring fold structure is bonded to said substrate by physically and electrically attaching said lead frame conductors on said lower horizontal region of said recurring structure to conductor on or in said substrate.
Claim 16
Dependent Claim
236 words
A vertical semiconductor chip package comprising: a substrate; a tape carrier with semiconductor chips located in openings in said carrier and physically and electrically attached to lead frame conductors which are carried on said carrier and are thermo compression bonded to said chips; said tape carrier is in a convoluted form of a recurring fold structure; said recurring structure includes a lower horizontal region, first and second vertical regions and a higher horizontal region; said regions are connected to one another with the said lower region being connected to and perpendicular to said first vertical region, said first vertical region being connected to and perpendicular to said higher horizontal region on the opposite side to said lower horizontal region, the said higher region being connected to and perpendicular to said second vertical region on the opposite side to said first vertical region, said first and second vertical regions are parallel to one another, and said second vertical region being connected to and perpendicular to the lower horizontal region in the next said recurring structure on the side opposite to said higher region; at least one of said first and second vertical regions carry a semiconductor chip therein; and said tape carrier of said recurring fold structure is bonded to said substrate by physically and electrically attaching said lead frame conductors on said lower horizontal region of said recurring structure to conductor on or in said substrate.
Claim 17
Dependent Claim
24 words
The vertical package of claim 13 wherein said chips are electrically connected to said tape carrier on more than one side of said chips.
Claim 18
Independent Claim
237 words
The method of forming a vertical semiconductor chip package comprising: providing a tape carrier with semiconductor chips located in openings in said carrier and physically and electrically attached to lead frame conductors which are carried on said carrier and are thermo compression bonded to said chips; folding said tape carrier into a convoluted form of a recurring fold structure; said recurring structure includes a lower horizontal region, first and second vertical regions and a higher horizontal region; said regions are connected to one another with the said lower region being connected to and perpendicular to said first vertical region, said first vertical region being connected to and perpendicular to said higher horizontal region on the opposite side to said lower horizontal region, the said higher region being connected to and perpendicular to said second vertical region on the opposite side to said first vertical region, said first and second vertical regions are parallel to one another, and said second vertical region being connected to and perpendicular to the lower horizontal region in the next said recurring structure on the side opposite to said higher region; at least one of said first and second vertical regions carry a semiconductor chip therein; and bonding said tape carrier of said recurring fold structure to a substrate by physically and electrically attaching lead frame conductors on said lower horizontal region of said recurring structure to conductors on or in said substrate.
Claim 19
Independent Claim
237 words
The method of forming a vertical semiconductor chip package comprising: providing a tape carrier with semiconductor chips located in openings in said carrier and physically and electrically attached to lead frame conductors which are carried on said carrier and are thermo compression bonded to said chips; folding said tape carrier into a convoluted form of a recurring fold structure; said recurring structure includes a lower horizontal region, first and second vertical regions and a higher horizontal region; said regions are connected to one another with the said lower region being connected to and perpendicular to said first vertical region, said first vertical region being connected to and perpendicular to said higher horizontal region on the opposite side to said lower horizontal region, the said higher region being connected to and perpendicular to said second vertical region on the opposite side to said first vertical region, said first and second vertical regions are parallel to one another, and said second vertical region being connected to and perpendicular to the lower horizontal region in the next said recurring structure on the side opposite to said higher region; at least one of said first and second vertical regions carry a semiconductor chip therein; and bonding said tape carrier of said recurring fold structure to a substrate by physically and electrically attaching lead frame conductors on said lower horizontal region of said recurring structure to conductors on or in said substrate.
Claim 20
Dependent Claim
21 words
The method of claim 15 wherein said chips are electrically connected to said tape carrier on four sides of said chips.
Claim 21
Dependent Claim
38 words
The method of claim 15 and further comprising: positioning a comb-shaped support frame with the teeth of the comb holding said lower region of said recurring structure against said substrate and permanently fixing said frame to said substrate.
References Cited (Backward Citations)
US3065383A
Cited
FR1355837A
Cited
US3341742A
Cited
US3469953A
Cited
US3766439A
Cited
US3873889A
Cited
US4059849A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1987-01-16 | 1987-07-18 | 1988-01-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1991-01-16 | 1991-07-18 | 1992-01-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1995-01-16 | 1995-07-18 | 1996-01-17 | $7700.00 | Window Closed / Lapsed |