US4426625A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Circuit for linearly gain controlling a differential amplifier
Assignee: RCA Licensing Corp
•
Filing: 1981-08-27
•
Granted: 1984-01-17
•
Expires: 2001-08-27
Abstract
Abstract A circuit for linearly controlling the gain of a differential amplifier includes a differentially connected current splitter network biased by means of a symmetrical bias circuit coupled to a common operating potential and including first and second current sources with associated first and second impedances. The current splitter includes a diode exhibiting a non-linear voltage in response to linear current conduction, and a transistor. The bias circuit responds to a variable gain control voltage for causing the diode to conduct current which varies linearly with the gain control voltage. First and second mutually differential control voltages derived from the transistor and diode, including a non-linearly varying voltage exhibited by the diode, are applied to the differential amplifier for controlling the conduction of the differential amplifier linearly with respect to the original control voltage.
Inventors
- 👤 Leopold A. Harwood
- 👤 II Robert L. Shanley
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 12:55
CPC Classifications
H; H03; H03G; H03G3/00; H03G3/02; H03G3/04; H03G3/10; H03G1/00; H03G1/0005; H03G1/0017; H03G1/0023
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
358 words
Apparatus for controlling the gain of a differential amplifier having first and second control inputs, comprising: a first source of supply potential; a second source of supply potential; a current steering network including (a) a first transistor having a control electrode for controlling the current conducted in the main current conduction path of said first transistor; (b) a semiconductor junction; and (c) a source of predetermined current coupled to said current path of said first transistor and to said semiconductor junction for supplying current thereto; first means for controlling the conduction of said first transistor current path, comprising (a) a second transistor having a control electrode for controlling the conduction of the main current conduction path of said second transistor; (b) first and second impedances; and wherein (c) said first impedance, said conduction path of said second transistor, and said second impedance are connected in series in the order named, between said first and second sources of potential; second means for controlling the conduction of said semiconductor junction, comprising (a) a third transistor having a control electrode for controlling the conduction of the main current conduction path of said third transistor; (b) third and fourth impedances; and wherein (c) said third impedance, said conduction path of said third transistor, and said fourth impedance are connected in series in the order named, between said first and second sources of potential; means for generating a variable voltage; means for coupling said variable voltage to the control electrode of one of said second and third transistors; means for coupling a substantially fixed DC voltage to the control electrode of the other one of said second and third transistors; means for coupling a voltage developed by said first impedance to said control electrode of said first transistor at a first point; means for coupling a voltage developed by said third impedance to said semiconductor junction at a second point, for developing a current through said semiconductor junction which varies substantially linearly as a function of said variable voltage; and means for coupling voltages derived from said first and second points to said first and second control inputs of said differential amplifier, respectively.
Claim 2
Dependent Claim
358 words
Apparatus for controlling the gain of a differential amplifier having first and second control inputs, comprising: a first source of supply potential; a second source of supply potential; a current steering network including (a) a first transistor having a control electrode for controlling the current conducted in the main current conduction path of said first transistor; (b) a semiconductor junction; and (c) a source of predetermined current coupled to said current path of said first transistor and to said semiconductor junction for supplying current thereto; first means for controlling the conduction of said first transistor current path, comprising (a) a second transistor having a control electrode for controlling the conduction of the main current conduction path of said second transistor; (b) first and second impedances; and wherein (c) said first impedance, said conduction path of said second transistor, and said second impedance are connected in series in the order named, between said first and second sources of potential; second means for controlling the conduction of said semiconductor junction, comprising (a) a third transistor having a control electrode for controlling the conduction of the main current conduction path of said third transistor; (b) third and fourth impedances; and wherein (c) said third impedance, said conduction path of said third transistor, and said fourth impedance are connected in series in the order named, between said first and second sources of potential; means for generating a variable voltage; means for coupling said variable voltage to the control electrode of one of said second and third transistors; means for coupling a substantially fixed DC voltage to the control electrode of the other one of said second and third transistors; means for coupling a voltage developed by said first impedance to said control electrode of said first transistor at a first point; means for coupling a voltage developed by said third impedance to said semiconductor junction at a second point, for developing a current through said semiconductor junction which varies substantially linearly as a function of said variable voltage; and means for coupling voltages derived from said first and second points to said first and second control inputs of said differential amplifier, respectively.
Claim 3
Dependent Claim
20 words
Apparatus according to claim 1, wherein said semiconductor junction corresponds to a diode-connected transistor with interconnected collector and base electrodes.
Claim 4
Dependent Claim
47 words
Apparatus according to claim 1, wherein said variable voltage is coupled to the base of said second transistor; and wherein currents conducted by said first and third impedances vary linearly in the same sense and with substantially the same magnitude, as a function of said variable voltage.
Claim 5
Dependent Claim
18 words
Apparatus according to claims 1 or 3, wherein said first and third impedances are substantially equal in value.
Claim 6
Dependent Claim
16 words
Apparatus according to claim 4, wherein said second and fourth impedances are substantially equal in value.
Claim 7
Dependent Claim
60 words
Apparatus according to claim 1, and further comprising means for DC coupling said main current conduction path of said first transistor to said gain controlled differential amplifier with a sense for maintaining the quiescent output current of said differential amplifier substantially constant as the gain of said differential amplifier is varied in response to said derived first and second voltages.
Claim 8
Dependent Claim
55 words
Apparatus according to claim 1, wherein said means for coupling said voltage developed by said first impedance to said first transistor at said first point comprises an emitter follower transistor; and said means for coupling said voltage developed by said third impedance to said semiconductor junction at said second point comprises an emitter follower transistor.
Claim 9
Dependent Claim
18 words
Apparatus according to claim 1, wherein said variable voltage is coupled to the base of said third transistor.
Claim 10
Dependent Claim
27 words
Apparatus according to claim 8, wherein said first and third impedances are substantially equal in value; and said second and fourth impedances are substantially equal in value.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1987-01-16 | 1987-07-18 | 1988-01-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1991-01-16 | 1991-07-18 | 1992-01-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1995-01-16 | 1995-07-18 | 1996-01-17 | $7700.00 | Window Closed / Lapsed |