Rectifier controller

Claim 2

A controller for a rectifier of first, second and third phase alternating current voltage signals for supplying a controlled direct current voltage to a load, said rectifier including three pairs of solid state gate controlled rectifying devices connected in a bridge configuration to a common output bus, each of said pair of devices connected to receive one of said first, second or third phase voltage signals to rectify both the positive half and negative half of the respective applied voltage signal, which comprises: means for detecting comprising voltage detection means for receiving said first, second and third voltage signals and for providing outputs when respective ones of said voltage signals are greater than ones of the other said voltage signals; and means for providing gate control signals comprising logic means responsive to comparator means responsive to said voltage signals for generating a dwell output signal each time any pair of said voltage signals is equal, and responsive to said outputs for providing a first set of gate control signals for indicating which of said voltage signals are most positive at any point in time and for providing a second set of gate control signals for indicating which of said voltage signals are most negative at any point in time, said first set of gate control signals connected to be applied to the gates of one of said devices in each pair, and said second set of gate control signals connected to be applied to the gates of the other of said devices in each pair.

Claim 3

A rectifier controller as set forth in claim 1, further comprising: means connected to said logic means and responsive to an input command for delaying the generation of said first and second sets of gate control signals for a predetermined time period.

Claim 4

A rectifier controller as set forth in claim 2, wherein said means responsive to an input command comprises: means for receiving said input command; counter means connected to said means for receiving said input command for counting a number in accordance with said input command and for providing a count output signal when said number has been counted; and means connecting said count output signal to said logic means to delay said gate control signals in time in accordance with the time period required to count said number.

Claim 5

A rectifier controller as set forth in claim 3, wherein said means connecting said count output signal to said logic means comprises a flip-flop which is set in response to said count output signal and which is reset in response to said dwell output signal.

Claim 6

A controller for a rectifier of first, second and third phase alternating current voltage signals for supplying a controlled direct current voltage to a load, said rectifier including three pairs of solid state gate controlled rectifying devices connected in a bridge configuration to a common output bus, each of said pair of devices connected to receive one of said first, second or third phase voltage signals to rectify both the positive half and negative half of the respective applied voltage signal, which comprises: means for detecting comprising voltage detection means for receiving said first, second and third voltage signals and for providing outputs when respective ones of said voltage signals are greater than ones of the other said voltage signals; means for providing gate control signals comprising logic means responsive to said outputs for providing a first set of three gate control signals for indicating which of said voltage signals are most positive at any point in time, and for providing a second set of three gate control signals for indicating which of said voltage signals are most negative at any point in time, said first set of three gate control signals connected to be applied to the gates of one of said devices in each pair, and said second set of three gate control signals connected to be applied to the gates of the other of said devices in each pair; and means responsive to said controlled direct current voltage and connected to said logic means for removing said gate control signals when said controlled direct current voltage drops below a predetermined level.

Claim 7

A controller for a rectifier of first, second and third phase alternating current voltage signals for supplying a controlled direct current voltage to a load, said rectifier including three pairs of solid state gate controlled rectifying devices connected in a bridge configuration to a common output bus, each of said pair of devices connected to receive one of said first, second or third phase voltage signals to rectify both the positive half and negative half of the respective applied voltage signal, which comprises: means for detecting comprising voltage detection means for receiving said first, second and third voltage signals and for providing outputs when respective ones of said voltage signals are greater than ones of the other said voltage signals; means for providing gate control signals comprising logic means responsive to said outputs for providing a first set of three gate control signals for indicating which of said voltage signals are most positive at any point in time, and for providing a second set of three gate control signals for indicating which of said voltage signals are most negative at any point in time, said first set of three gate control signals connected to be applied to the gates of one of said devices in each pair, and said second set of three gate control signals connected to be applied to the gates of the other of said devices in each pair; and means responsive to said controlled direct current voltage and connected to said logic means for removing said gate control signals when said controlled direct current voltage drops below a predetermined level.

Claim 8

A rectifier controller as set forth in claim 5, wherein said means responsive to said controlled direct current voltage comprises: detection means connected to said output bus for detecting a predetermined change in the level of said controlled direct current voltage and time delay means responsive to the output of said detection means for disabling said gate control signals for a predetermined period of time.

Claim 9

A rectifier controller as set forth in claim 5, further including means responsive to said means for removing said gate control signals for short circuiting said output bus.

Claim 10

A rectifier controller as set forth in claim 7, wherein said means for short circuiting comprises a gate controlled rectifier having a control electrode and having anode and cathode electrodes connected across said output bus.

Claim 11

A rectifier controller as set forth in claim 5, wherein said means responsive to said controlled direct current voltage for removing said gate control signals comprises: a capacitor connected to said output bus; means for sensing the current flow through said capacitor; and means responsive to said means for sensing for producing a control voltage of a predetermined time period, and for controlling said gate control signals in accordance with said predetermined time period.

Claim 12

A rectifier controller as set forth in claim 6, further including: second counter means for counting each detection of said predetermined change in said level of said controlled direct current voltage, and producing an output when a predetermined number of detections have been counted; and means for shutting down said rectifier in response to said output from said second counter means within a predetermined time.

Claim 13

A controller for a rectifier of first, second and third phase alternating current voltage signals for supplying a controlled direct current voltage to a load, said rectifier including three pairs of solid stage gate controlled rectifying devices connected in a bridge configuration to a common output bus, each of said pair of devices connected to receive one of said first, second or third phase voltage signals to rectify both the positive half and negative half of the respective applied voltage signal, which comprises: means for detecting comprising voltage detection means for receiving said first, second and third voltage signals and for providing six outputs when respective ones of said voltage signals are greater than ones of the other said voltage signals, said six outputs comprising a first output when said first phase voltage signal is greater than said second phase voltage signal, a second output when said second phase voltage signal is greater than said first phase voltage signal, a third output when said second phase voltage signal is greater than said third phase voltage signal, a fourth output when said third phase voltage signal is greater than said second phase, a fifth output when said third phase voltage signal is greater than said first phase voltage signal, and a sixth output when said first phase voltage signal is greater than said third phase voltage signal; and means for providing gate control signals comprising logic means responsive to said six outputs for providing a first set of three gate control signals for indicating which of said voltage signals are most positive at any point in time, and for providing a second set of three gate control signals for indicating which of said voltage signals are most negative at any point in time, said first set of three gate control signals connected to be applied to the gates of one of said devices in each pair, and said second set of three gate control signals connected to be applied to the gates of the other of said devices in each pair, said second set of three gate control signals connected to be applied to the gates of the other of said devices in each pair, said logic means comprising a plurality of gate means each having as two inputs thereto two of said six outputs from said voltage detection means, said plurality of gate means comprising, first, second, third, fourth, fifth and sixth gates, the two inputs to said first gate comprising said first and fourth inputs, the two inputs to said second gate comprising said fourth and fifth outputs, the two inputs to said third gate comprising said second and fifth outputs, the two inputs to said fourth gate comprising said second and third outputs, the two inputs to said fifth gate comprising said third and sixth outputs, the two inputs to said sixth gate comprising said first and sixth outputs, and said first, second, third, fourth, fifth and sixth gates each having a common third input which acts to inhibit said gate control signals in response to disable signals from: means for time-delaying said gate control signals for adjusting the magnitude of said controlled direct current voltage: means for detecting a shoot-through condition on said output bus; means for detecting a plurality of shoot-through conditions on said output bus; means responsive to a command signal for turning off said rectifier; means for detecting a current overload on said output bus; and means for detecting power failure.

Claim 14

A controller for a rectifier of first, second and third phase alternating current voltage signals for supplying a controlled direct current voltage to a load, said rectifier including three pairs of solid stage gate controlled rectifying devices connected in a bridge configuration to a common output bus, each of said pair of devices connected to receive one of said first, second or third phase voltage signals to rectify both the positive half and negative half of the respective applied voltage signal, which comprises: means for detecting comprising voltage detection means for receiving said first, second and third voltage signals and for providing six outputs when respective ones of said voltage signals are greater than ones of the other said voltage signals, said six outputs comprising a first output when said first phase voltage signal is greater than said second phase voltage signal, a second output when said second phase voltage signal is greater than said first phase voltage signal, a third output when said second phase voltage signal is greater than said third phase voltage signal, a fourth output when said third phase voltage signal is greater than said second phase, a fifth output when said third phase voltage signal is greater than said first phase voltage signal, and a sixth output when said first phase voltage signal is greater than said third phase voltage signal; and means for providing gate control signals comprising logic means responsive to said six outputs for providing a first set of three gate control signals for indicating which of said voltage signals are most positive at any point in time, and for providing a second set of three gate control signals for indicating which of said voltage signals are most negative at any point in time, said first set of three gate control signals connected to be applied to the gates of one of said devices in each pair, and said second set of three gate control signals connected to be applied to the gates of the other of said devices in each pair, said second set of three gate control signals connected to be applied to the gates of the other of said devices in each pair, said logic means comprising a plurality of gate means each having as two inputs thereto two of said six outputs from said voltage detection means, said plurality of gate means comprising, first, second, third, fourth, fifth and sixth gates, the two inputs to said first gate comprising said first and fourth inputs, the two inputs to said second gate comprising said fourth and fifth outputs, the two inputs to said third gate comprising said second and fifth outputs, the two inputs to said fourth gate comprising said second and third outputs, the two inputs to said fifth gate comprising said third and sixth outputs, the two inputs to said sixth gate comprising said first and sixth outputs, and said first, second, third, fourth, fifth and sixth gates each having a common third input which acts to inhibit said gate control signals in response to disable signals from: means for time-delaying said gate control signals for adjusting the magnitude of said controlled direct current voltage: means for detecting a shoot-through condition on said output bus; means for detecting a plurality of shoot-through conditions on said output bus; means responsive to a command signal for turning off said rectifier; means for detecting a current overload on said output bus; and means for detecting power failure.

Claim 15

A rectifier controller as set forth in claim 11, wherein said means for detecting a shoot-through condition acts to disable said rectifier for a relatively short, predetermined period of time.

Claim 16

A rectifier controller as set forth in claim 11, wherein said means for detecting a plurality of shoot-through conditions acts to turn off said rectifier until such time as an external clear command is provided or a manual switch is actuated.

Claim 17

A controller for a rectifier of first, second and third phase A.C. voltage signals for supplying a controlled direct current voltage to an output bus, said rectifier including three pairs of gate controlled rectifying devices connected in a bride configuration to said output bus, each of said pair of devices connected to receive one of said first, second or third phase voltage signals to rectify both the positive and negative halves of the respective voltage signal, which comprises: detecting means comprising six voltage detector means, each of said voltage detector means being responsive to a pair of said voltage signals for supplying said output signal having a first binary state when one of said pair of voltage signals is greater than the other said pair of voltage signals, each of said voltage detector means comprising opto-isolator means connected to receive said pair of voltage signals for providing a logic signal when one of said pair of voltage signals is greater than the other of said pair of voltage signals and Schmitt trigger means connected to said opto-isolator means for producing said output signal in response to said logic signal; and logic means comprising six binary logic means, each of said binary logic means connected to a pair of said voltage detector means for generating a gate control signal when each of said output signals from said pair of voltage detector means is in said first binary state.

Claim 18

A controller for a rectifier of first, second and third phase A.C. voltage signals for supplying a controlled direct current voltage to an output bus, said rectifier including three pairs of gate controlled rectifying devices connected in a bride configuration to said output bus, each of said pair of devices connected to receive one of said first, second or third phase voltage signals to rectify both the positive and negative halves of the respective voltage signal, which comprises: detecting means comprising six voltage detector means, each of said voltage detector means being responsive to a pair of said voltage signals for supplying said output signal having a first binary state when one of said pair of voltage signals is greater than the other said pair of voltage signals, each of said voltage detector means comprising opto-isolator means connected to receive said pair of voltage signals for providing a logic signal when one of said pair of voltage signals is greater than the other of said pair of voltage signals and Schmitt trigger means connected to said opto-isolator means for producing said output signal in response to said logic signal; and logic means comprising six binary logic means, each of said binary logic means connected to a pair of said voltage detector means for generating a gate control signal when each of said output signals from said pair of voltage detector means is in said first binary state.

Claim 19

A controller for a rectifier of first, second and third phase A.C. voltage signals for supplying a controlled direct current voltage to an output bus, said rectifier including three pairs of gate controlled rectifying devices connected in a bridge configuration to said output bus, each of said pair of devices connected to receive one of said first, second or third phase voltage signals to rectify both the positive and negative halves of the respective voltage signal, which comprises: detecting means comprising six voltage detector means, each of said voltage detector means being responsive to a pair of said voltage signal for supplying said output signal having a first binary state when one of said pair of voltage signals is greater than the other said pair of voltage signals; logic means comprising six binary logic means, each of said binary logic means connected to a pair of said voltage detector means for generating a gate control signal when each of said output signals from said pair of voltage detector means is in said first binary state; means for generating a high frequency pulse signal in accordance with said gate control signal; and means for converting said high frequency pulse signal into a D.C. gate control signal, and for providing said D.C. gate control signal to one of said gate controlled rectifying devices.

Claim 20

A controller for a rectifier of first, second and third phase A.C. voltage signals for supplying a controlled direct current voltage to an output bus, said rectifier including three pairs of gate controlled rectifying devices connected in a bridge configuration to said output bus, each of said pair of devices connected to receive one of said first, second or third phase voltage signals to rectify both the positive and negative halves of the respective voltage signal, which comprises: detecting means comprising six voltage detector means, each of said voltage detector means being responsive to a pair of said voltage signal for supplying said output signal having a first binary state when one of said pair of voltage signals is greater than the other said pair of voltage signals; logic means comprising six binary logic means, each of said binary logic means connected to a pair of said voltage detector means for generating a gate control signal when each of said output signals from said pair of voltage detector means is in said first binary state; means for generating a high frequency pulse signal in accordance with said gate control signal; and means for converting said high frequency pulse signal into a D.C. gate control signal, and for providing said D.C. gate control signal to one of said gate controlled rectifying devices.

Claim 21

A rectifier controller as set forth in claim 15, wherein said means for generating a high frequency pulse signal comprises: gate pulse generator; and a gate amplifier connected to receive the output from said generator.

Claim 22

A rectifier controller as set forth in claim 15, wherein said means for converting said high frequency pulse signal comprises: isolation transformer means having a first winding for receiving said high frequency pulse signal and a second winding; and means connected to said second winding for rectifying said high frequency pulse signal.