US4423456A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Battery reversal protection
Assignee: Medtronic Inc
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Filing: 1981-11-13
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Granted: 1983-12-27
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Expires: 2001-11-13
Abstract
Abstract A semiconductor circuit for protecting battery powered electronic devices from damage due to polarity reversal. A metal oxide semiconductor is employed in series with the power source to switch the power input as appropriate. A first embodiment simply disables the power source input upon improper polarity. A second embodiment actually reverses the effective polarity to the load. Because the source-to-drain impedance of the metal oxide semiconductor device is resistive, a number of protection devices may be used in parallel to achieve an arbitrarily low voltage drop between power source and load for a given current drain.
Inventors
- 👤 Gary A. Zaidenweber
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 18:51
CPC Classifications
H; H02; H02H; H02H11/00; H02H11/002; H02H11/003; Y; Y10; Y10S; Y10S320/00; Y10S320/15
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
164 words
A polarity reversal protection circuit connectable between a pair of source lines and a pair of load lines comprising: first and second field-effect transistors of a first channel type having their source-drain paths connected in series across said source lines; and, third and fourth field-effect transistors of a second channel type having their source-drain paths connected in series across said source lines and in parallel with the source-drain paths of said first and second transistors; and, wherein the gate electrodes of said first and third transistors are directly coupled together and to only one of said source lines and the gate electrodes of said second and fourth transistors are directly coupled together and to only the other of said source lines; and, one of said load lines is connected to the junction point of the drains of said first and second transistors; and, the other of said load lines is connected to the junction point of the drains of said third and fourth transistors.
Claim 2
Dependent Claim
164 words
A polarity reversal protection circuit connectable between a pair of source lines and a pair of load lines comprising: first and second field-effect transistors of a first channel type having their source-drain paths connected in series across said source lines; and, third and fourth field-effect transistors of a second channel type having their source-drain paths connected in series across said source lines and in parallel with the source-drain paths of said first and second transistors; and, wherein the gate electrodes of said first and third transistors are directly coupled together and to only one of said source lines and the gate electrodes of said second and fourth transistors are directly coupled together and to only the other of said source lines; and, one of said load lines is connected to the junction point of the drains of said first and second transistors; and, the other of said load lines is connected to the junction point of the drains of said third and fourth transistors.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1986-12-26 | 1987-06-27 | 1987-12-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1990-12-26 | 1991-06-27 | 1991-12-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1994-12-26 | 1995-06-27 | 1995-12-27 | $7700.00 | Window Closed / Lapsed |