Arrangement for control of the operation of a random access memory in a data processing system

Claim 1

In a data processing system including a first memory to be refreshed; a second memory for storing data to be successively read out during first periodic cycles; and a central processing unit for effecting transfer of data to and from said first and second memories during second periodic cycles which alternate with said first periodic cycles; the improvement comprising display control address generating means for producing addresses sequentially during said first periodic cycles to periodically read out the contents of said second memory; address selecting means which alternately and exclusively selects an address derived from said central processing unit or an address derived from said display control address generating means during said first and second periodic cycles and supplies the selected address in common to said first and second memories whereby, when said address selecting means selects an address from said central processing unit, said central processing unit executes a data transfer to one of said first and second memories, and when said address selecting means selects the address from display control address generating means, said first memory is refreshed and said second memory reads out stored data; and control signal generating means responsive to said display control address generating means generating an address for producing a control signal to cause said address selecting means to perform said selection operation in synchronism with the address generation of said display control address generating means.