Patent US4417165A successfully refreshed from Google Patents.
US4417165A
Expired / Lapsed
US
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Muting circuit
Assignee: Olympus Corp
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Filing: 1982-05-21
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Granted: 1983-11-22
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Expires: 2002-05-21
Abstract
Abstract A muting circuit having a first resistor (R10) one end (a) of which is supplied with an input signal, a second resistor (R12) serially connected to the first resistor, a first transistor (14) whose collector is connected to the junction point (b) of the first and second resistors, and a second transistor (16) whose collector is connected to the other end (c) of the second resistor. The emitters of the first and second transistors are grounded, and the bases thereof are supplied with a DC muting signal. An output signal derived from the other end of the second resistor is attenuated when the muting signal is supplied to the first and second transistors.
Inventors
- 👤 Kenji Fujibayashi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 15:32
CPC Classifications
H; H03; H03G; H03G3/00; H03G3/20; H03G3/30; H03G3/34
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
293 words
A muting circuit comprising: an input circuit which receives an input signal of the muting circuit and provides a first signal corresponding to said input signal, said input circuit having a given circuit impedance; a volume control circuit having a given circuit impedance, which is provided with an input terminal for receiving said first signal, an output terminal for providing a second signal and a ground terminal coupled to a circuit with zero AC potential, a ratio between the magnitude of said second signal to that of said first signal being varied under control of said volume control circuit; an impedance element having two terminals, one terminal of which is coupled to the output terminal of said volume control circuit and the other terminal of which provides an output signal of said muting circuit; a first bipolar transistor which has a collector coupled to the one terminal of said impedance element and an emitter coupled to said zero AC potential circuit; a second bipolar transistor which has a collector coupled to the other terminal of said impedance element and an emitter coupled to said zero AC potential circuit; and muting signal supply means coupled to each base of said first and second transistors for simultaneously supplying a DC muting signal, said muting signal supply means including a first resistor connected at one end to a base of said first transistor, and a second resistor connected at one end to a base of said second transistor, the other ends of said first and second resistors being connected to each other, and the resistance values of said first and second resistors being so selected that said first and second transistors are turned on substantially at the same time when said muting signal is supplied thereto.
Claim 2
Dependent Claim
293 words
A muting circuit comprising: an input circuit which receives an input signal of the muting circuit and provides a first signal corresponding to said input signal, said input circuit having a given circuit impedance; a volume control circuit having a given circuit impedance, which is provided with an input terminal for receiving said first signal, an output terminal for providing a second signal and a ground terminal coupled to a circuit with zero AC potential, a ratio between the magnitude of said second signal to that of said first signal being varied under control of said volume control circuit; an impedance element having two terminals, one terminal of which is coupled to the output terminal of said volume control circuit and the other terminal of which provides an output signal of said muting circuit; a first bipolar transistor which has a collector coupled to the one terminal of said impedance element and an emitter coupled to said zero AC potential circuit; a second bipolar transistor which has a collector coupled to the other terminal of said impedance element and an emitter coupled to said zero AC potential circuit; and muting signal supply means coupled to each base of said first and second transistors for simultaneously supplying a DC muting signal, said muting signal supply means including a first resistor connected at one end to a base of said first transistor, and a second resistor connected at one end to a base of said second transistor, the other ends of said first and second resistors being connected to each other, and the resistance values of said first and second resistors being so selected that said first and second transistors are turned on substantially at the same time when said muting signal is supplied thereto.
Claim 3
Dependent Claim
37 words
A muting circuit of claim 1, wherein the connection point of said first and second resistors is coupled to said zero AC potential circuit via a capacitor for the smooth starting and ending of the muting operation.
Claim 4
Dependent Claim
25 words
A muting circuit of any one of claims 1 or 2, wherein said input circuit includes a reactance element for varying the frequency response thereof.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1986-11-21 | 1987-05-23 | 1987-11-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1990-11-21 | 1991-05-23 | 1991-11-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1994-11-21 | 1995-05-23 | 1995-11-22 | $7700.00 | Window Closed / Lapsed |