Patent US4414666A successfully refreshed from Google Patents.
US4414666A
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Error checking and correcting apparatus
Assignee: National Semiconductor Corp
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Filing: 1981-04-30
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Granted: 1983-11-08
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Expires: 2001-04-30
Abstract
Abstract An error checking apparatus and method for detecting a plurality of errors in a digital data word includes means for generating a unique syndrome word for each one of a plurality of error patterns in a word containing up to N-1 bits in error, where N is the number of bits in said word.
Inventors
- 👤 Robert D. Nelson
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 21:29
CPC Classifications
H; H03; H03M; H03M13/00; H03M13/03; H03M13/05; H03M13/09
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
147 words
A digital error detecting apparatus comprising means for storing a data word containing up to N-1 bits in error where N is the number of bits in said data word; and means responsive to said means for storing said data word for generating a unique syndrome word for each one of a plurality of possible error patterns in said data word, wherein said unique syndrome word generating means comprises: means for generating a first syndrome word corresponding to the location of bits in error in said data word; means for changing the relative significance of the bits in said data word after said generating of said first syndrome word; means for generating a succeeding syndrome word corresponding to the bits in error in said data word after each such change in significance; and means for combining said first and second succeeding syndrome words in a predetermined manner.
Claim 2
Dependent Claim
147 words
A digital error detecting apparatus comprising means for storing a data word containing up to N-1 bits in error where N is the number of bits in said data word; and means responsive to said means for storing said data word for generating a unique syndrome word for each one of a plurality of possible error patterns in said data word, wherein said unique syndrome word generating means comprises: means for generating a first syndrome word corresponding to the location of bits in error in said data word; means for changing the relative significance of the bits in said data word after said generating of said first syndrome word; means for generating a succeeding syndrome word corresponding to the bits in error in said data word after each such change in significance; and means for combining said first and second succeeding syndrome words in a predetermined manner.
Claim 3
Dependent Claim
21 words
An apparatus according to claim 1 wherein said combining means comprises means for concatenating said first and said succeeding syndrome words.
Claim 4
Independent Claim
124 words
A method of detecting errors in the bits of a data word containing up to N-1 bits in error where N is the number of bits in said data word comprising the steps of generating a unique syndrome word for each one of a plurality of possible error patterns in said data word, wherein said generating step comprises the steps of: generating a first syndrome word corresponding to the location of the bits in error in said data word; changing the relative significance of the bits in said data word; generating a succeeding syndrome word corresponding to the bits in error in said data word after each such change in significance; and combining said first and second succeeding syndrome words in a predetermined manner.
Claim 5
Independent Claim
124 words
A method of detecting errors in the bits of a data word containing up to N-1 bits in error where N is the number of bits in said data word comprising the steps of generating a unique syndrome word for each one of a plurality of possible error patterns in said data word, wherein said generating step comprises the steps of: generating a first syndrome word corresponding to the location of the bits in error in said data word; changing the relative significance of the bits in said data word; generating a succeeding syndrome word corresponding to the bits in error in said data word after each such change in significance; and combining said first and second succeeding syndrome words in a predetermined manner.
Claim 6
Dependent Claim
22 words
A method according to claim 3 wherein said combining step comprises the step of concatenating said first and said succeeding syndrome words.
Claim 7
Dependent Claim
19 words
A method according to claim 3 wherein said significance changing step comprises the step of rotating said data word.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1986-11-07 | 1987-05-09 | 1987-11-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1990-11-07 | 1991-05-09 | 1991-11-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1994-11-07 | 1995-05-09 | 1995-11-08 | $7700.00 | Window Closed / Lapsed |