Patent US4414434A successfully refreshed from Google Patents.
US4414434A
Expired / Lapsed
US
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Electronic subscriber line interface circuit having means to equalize current through the output differential amplifier
Assignee: Telecommunications Radioelectriques et Telephoniques SA TRT
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Filing: 1981-03-30
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Granted: 1983-11-08
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Expires: 2001-03-30
Abstract
Abstract In this subscriber line interface circuit which comprises a pair of amplifiers whose outputs are connected to the subscriber's line, the input terminals of these amplifiers receive by means of negative feedback voltages having opposite phases depending on the transversal current I produced by the line interface circuit and independent of the longitudinal currents I accidentally produced on the subscriber's line. The two load impedances, which are connected between the supply terminals of the amplifiers and the terminals of a d.c. voltage supply source are controlled by means of their control terminals by voltages which have the same characteristics as the voltages applied to the input terminals of the amplifiers but which in addition have been shifted with a certain shift voltage V z . Consequently, the amplifiers of the line interface circuit operate completely independent of the longitudinal currents.
Inventors
- 👤 Gilbert M. M. Ferrieu
- 👤 Etienne J. R. Osmond
- 👤 Yves J. F. Hetet
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 12:33
CPC Classifications
H; H04; H04M; H04M19/00; H04M19/001; H04M19/005
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
316 words
A subscriber's line interface circuit comprising: a pair of load impedance circuits, a d.c. voltage supply source, a pair of amplifiers, a first respective output terminal of each of said pair of amplifiers being connected one amplifier to one wire, the other amplifier to the other wire of two wires of said subscriber's line, a respective supply terminal of each of said pair of amplifiers being connected one amplifier to one load impedance circuit and the other amplifier to the other load impedance circuit of said pair of load impedance circuits, respective input terminals of said pair of amplifiers receiving by means of negative feedback respective voltages which are in phase and in anti-phase with a voltage at respective control terminals of said pair of impedance circuits through which a sum current flows which is equal to a weighted sum of currents which enter and leave the subscriber's line with substantially equal weighting coefficients and the supply terminals of said pair of amplifiers each being connected to said d.c. voltage supply source by means of said respective load impedance circuits, said interface circuit further comprises means for forming two control voltages one for each of said load impedance circuits, a first control voltage which is formed by shifting with a predetermined shift voltage the voltage at the control terminal of one of said impedance circuits to which the sum current flows, the control voltage of the other of said impedance circuits being in anti-phase with the first control voltage, a corresponding amplifier in each of said impedance circuits, said control voltages being applied to said respective load impedance circuits with the same phase as the voltages applied to the input terminals of said corresponding amplifiers, said respective load impedance circuits further comprising a voltage follower circuit for producing at said respective supply terminals of said corresponding amplifiers, voltages which are substantially equal to said control voltages.
Claim 2
Dependent Claim
316 words
A subscriber's line interface circuit comprising: a pair of load impedance circuits, a d.c. voltage supply source, a pair of amplifiers, a first respective output terminal of each of said pair of amplifiers being connected one amplifier to one wire, the other amplifier to the other wire of two wires of said subscriber's line, a respective supply terminal of each of said pair of amplifiers being connected one amplifier to one load impedance circuit and the other amplifier to the other load impedance circuit of said pair of load impedance circuits, respective input terminals of said pair of amplifiers receiving by means of negative feedback respective voltages which are in phase and in anti-phase with a voltage at respective control terminals of said pair of impedance circuits through which a sum current flows which is equal to a weighted sum of currents which enter and leave the subscriber's line with substantially equal weighting coefficients and the supply terminals of said pair of amplifiers each being connected to said d.c. voltage supply source by means of said respective load impedance circuits, said interface circuit further comprises means for forming two control voltages one for each of said load impedance circuits, a first control voltage which is formed by shifting with a predetermined shift voltage the voltage at the control terminal of one of said impedance circuits to which the sum current flows, the control voltage of the other of said impedance circuits being in anti-phase with the first control voltage, a corresponding amplifier in each of said impedance circuits, said control voltages being applied to said respective load impedance circuits with the same phase as the voltages applied to the input terminals of said corresponding amplifiers, said respective load impedance circuits further comprising a voltage follower circuit for producing at said respective supply terminals of said corresponding amplifiers, voltages which are substantially equal to said control voltages.
Claim 3
Dependent Claim
49 words
A subscriber line interface circuit as claimed in claim 1, wherein the said shift voltage is selected for producing in the range of the currents in the subscriber's line, a predetermined voltage difference between the supply terminal and the input terminal of each amplifier of the line interface circuit.
Claim 4
Dependent Claim
128 words
A subscriber line interface circuit as claimed in one of the claims 1 or 2, wherein said voltage follower circuit in each load impedance circuit is formed a composite transistor, the base of which receives one of the said control voltages, the emitter being connected to the supply terminal of one of the said amplifiers, the collector being connected to a terminal of the direct current source across a resistor having a low ohmic value with respect to a value of a resistor of a resistance bridge of said line interface circuit and finally the emitter and the collector being interconnected by means of a resistor which has a resistance value which is near the value of the resistor of the resistance bridge of the line interface circuit.
Claim 5
Dependent Claim
69 words
A subscriber line interface circuit as claimed in claim 3, wherein said resistor which is connected between the emitter and the collector of the transistor forming the voltage follower circuit has a resistance value which is equal to the difference between the value of the resistor of the resistance bridge of the line interface circuit and the value of the resistor connected to the emitter of the said transistor.
Claim 6
Dependent Claim
49 words
A subscriber line interface circuit as claimed in claim 4, wherein said resistor connected between the emitter and the collector of the said voltage follower circuit is a thermistor the resistance value of which increases suddenly with respect to the maximum permissible current supplied by the line interface circuit.
Claim 7
Dependent Claim
46 words
A subscriber line interface circuit as claimed in claim 1, wherein said load impedance circuit comprises means to detect when a maximum current supplied by said line interface circuit is exceeded and to block said voltage follower circuit when the exceeding of this current is detected.
References Cited (Backward Citations)
GB2024504B
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1986-11-07 | 1987-05-09 | 1987-11-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1990-11-07 | 1991-05-09 | 1991-11-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1994-11-07 | 1995-05-09 | 1995-11-08 | $7700.00 | Window Closed / Lapsed |