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US4410816A Expired / Lapsed US ⏱️ 0.0 years remaining

ECL Integrated circuit

Assignee: Fujitsu Ltd
•
Filing: 1981-12-04
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Granted: 1983-10-18
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Expires: 2001-12-04
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Abstract

Abstract An ECL integrated circuit comprises an emitter-follower transistor at the output stage and a pull-down resistor connected to the emitter-follower transistor. The ECL integrated circuit is provided with a test circuit on a line extending from the output of emitter-follower transistor to a subsequent stage so as to cause a test current to flow only at the time of the test. The test current is smaller than the current usually flowing to the pull-down resistor but larger than the current flowing to the subsequent stage.

Inventors

  • 👤 Yasunori Kanai

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 16:28
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/003; H03K19/00307; G; G01; G01R; G01R31/00; G01R31/28; G01R31/316; H03K19/02; H03K19/08; H03K19/082; H03K19/086

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 89 words
An ECL integrated circuit comprising: at least one ECL circuit having an emitter-follower transistor at the output stage and pull-down means connected to said emitter-follower transistor; a subsequent stage connected to the emitter follower transistor; a test circuit, connected to the output of said emitter-follower transistor for causing an auxiliary current to flow only at the time of a test, said auxiliary current having a value smaller than the current flowing through said pull-down means but larger than the input current flowing to said subsequent stage during normal operation.
Claim 2
Dependent Claim 89 words
An ECL integrated circuit comprising: at least one ECL circuit having an emitter-follower transistor at the output stage and pull-down means connected to said emitter-follower transistor; a subsequent stage connected to the emitter follower transistor; a test circuit, connected to the output of said emitter-follower transistor for causing an auxiliary current to flow only at the time of a test, said auxiliary current having a value smaller than the current flowing through said pull-down means but larger than the input current flowing to said subsequent stage during normal operation.
Claim 3
Dependent Claim 59 words
An ECL integrated circuit according to claim 1, further comprising first and second power sources, wherein said pull-down means comprises: a transistor having a collector connected to said emitter follower transistor, having a base connected to the first power source and having an emitter; a resistor connected to the emitter of said transistor and to said second power source.
Claim 4
Dependent Claim 15 words
An ECL integrated circuit according to claim 1, wherein said pull-down means comprises a resistor.
Claim 5
Dependent Claim 45 words
An ECL integrated circuit according to claim 1, 2 or 3, wherein said test circuit comprises a resistor and a diode connected in series and wherein said resistor is connected to the output of said emitter-follower transistor and to the input of said subsequent stage.
Claim 6
Dependent Claim 68 words
An ECL integrated circuit according to claim 1, further comprising a first power source and a test terminal, wherein said test circuit comprises: a resistor connected to the output of said emitter follower transistor and the input of said second stage, and a transistor having a collector connected to the power source, having an emitter connected to said resistor and having a base connected to said test terminal.
Claim 7
Dependent Claim 38 words
An ECL integrated circuit according to claim 1, further comprising a power source, a test terminal and a resistor having a first end connected to said power source and having a second end connected to said test terminal.
Claim 8
Dependent Claim 112 words
An ECL integrated circuit comprising: a plurality of ECL circuits arranged in successive stages, each of which comprises: a test terminal; an output stage having an emitter-follower transistor; a pull-down resistor connected to said emitter-follower transistor; and a test circuit, connected to the output of said emitter-follower transistor and to a subsequent one of the successive stages, for causing auxiliary current to flow at the time of a testing, said test circuit including a first resistor and a diode connected in series, said diode connected to said test terminal, said first resistor connected to the output of said emitter-follower transistor and to the input of said subsequent one of the successive stages.
Claim 9
Dependent Claim 112 words
An ECL integrated circuit comprising: a plurality of ECL circuits arranged in successive stages, each of which comprises: a test terminal; an output stage having an emitter-follower transistor; a pull-down resistor connected to said emitter-follower transistor; and a test circuit, connected to the output of said emitter-follower transistor and to a subsequent one of the successive stages, for causing auxiliary current to flow at the time of a testing, said test circuit including a first resistor and a diode connected in series, said diode connected to said test terminal, said first resistor connected to the output of said emitter-follower transistor and to the input of said subsequent one of the successive stages.
Claim 10
Dependent Claim 114 words
An ECL integrated circuit connected to a power source comprising: a plurality of ECL circuits arranged in successive stages, each of which comprises: a test terminal; an output stage having an emitter-follower transistor; a pull-down resistor connected to said emitter-follower transistor; a test circuit connected to the output of said emitter-follower transistor and to a subsequent one of the successive stages for causing auxiliary current to flow at the time of a testing, said test circuit including a resistor connected to the output of said emitter-follower transistor, and a transistor having a collector connected to the power source, having an emitter connected to said resistor and having a base connected to said test terminal.
Claim 11
Dependent Claim 114 words
An ECL integrated circuit connected to a power source comprising: a plurality of ECL circuits arranged in successive stages, each of which comprises: a test terminal; an output stage having an emitter-follower transistor; a pull-down resistor connected to said emitter-follower transistor; a test circuit connected to the output of said emitter-follower transistor and to a subsequent one of the successive stages for causing auxiliary current to flow at the time of a testing, said test circuit including a resistor connected to the output of said emitter-follower transistor, and a transistor having a collector connected to the power source, having an emitter connected to said resistor and having a base connected to said test terminal.
Claim 12
Dependent Claim 42 words
An ECL integrated circuit according to claim 7, wherein said ECL integrated circuit is connected to a power source, further comprising a second resistor having a first end connected to said test terminal and a second end connected to the power source.

References Cited (Backward Citations)

US4074188A Cited
US4156819A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1986-10-17 1987-04-18 1987-10-18 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1990-10-17 1991-04-18 1991-10-18 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1994-10-17 1995-04-18 1995-10-18 $7700.00 Window Closed / Lapsed

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