Power saving line circuit

Claim 2

A power saving circuit comprising: (a) means for supplying power alternatively from a first voltage source or a second voltage source applying voltage lower than the first voltage source to a line, (b) means for detecting current drawn by said line which is higher than a first predetermined current level, when the first voltage source is connected to the line, (c) means for switching the second voltage source to the line in substitution for the first voltage source upon detection of said first current draw which is higher than the first predetermined level, (d) means for detecting current drawn by the line which is below a second predetermined current level which is lower than the first predetermined current level, and (e) means for switching the first voltage source to the line upon detection of said current drawn below said second predetermined current level.

Claim 3

A power saving circuit comprising: (a) means for applying current to a line from a low voltage source through a diode, said diode having its cathode connected in a circuit to the negative terminal of the low voltage source, (b) means for applying current from a higher voltage source through a switching means to the line with its negative terminal connected in a circuit to the anode of the diode through said switching means, whereby the diode is reverse biased when the switching means is closed, the positive terminals of both said sources being connected to line current return circuit means, (c) means for detecting current drawn by the line above a first predetermined current level, and (d) means for switching the switching means open circuited upon detection of said current above said predetermined current level.

Claim 4

A power saving circuit comprising: (a) means for applying current to a line from a low voltage source through a diode, said diode having its cathode connected in a circuit to the negative terminal of the low voltage source, (b) means for applying current from a higher voltage source through a switching means to the line with its negative terminal connected in a circuit to the anode of the diode through said switching means, whereby the diode is reverse biased when the switching means is closed, the positive terminals of both said sources being connected to line current return circuit means, (c) means for detecting current drawn by the line above a first predetermined current level, and (d) means for switching the switching means open circuited upon detection of said current above said predetermined current level.

Claim 5

A power saving circuit as defined in claim 2, in which the switching means is a VMOS device having source and drain terminals connected in a circuit between the higher voltage source and the line, and a gate terminal connected to a source of switching signals operated by the current detecting means.

Claim 6

A power saving circuit as defined in claim 2 or 3, further including means for detecting current drawn by the line which is below a second predetermined current level which is lower than the first predetermined current level, and means for switching the higher voltage source to the line upon detection of said current drawn below said second predetermined current level.

Claim 7

A power saving circuit as defined in claim 3, in which said gate terminal is connected via a circuit path to one output of a bistable flip flop, one input of the flip flop being connected to the output of means for detecting current drawn by the line above said first predetermined current level, and further including means for detecting current drawn by the line which is below a second predetermined current level which is less than the first predetermined current level, its output being connected to a second input of the flip flop for causing the switching of the switching means closed upon detection of said current drawn below said second predetermined current level.

Claim 8

A power saving circuit comprising: (a) a subscriber's line circuit including tip and ring leads, (b) a pair of resistors, each having one terminal connected to a corresponding tip or ring lead, the other terminal of one resistor being connected to a common voltage terminal, (c) a diode having its anode connected to the other terminal of the other resistor, and its cathode connected to a power supply providing one voltage level, (d) a bipolar current switch means connecting the other terminal of the other resistor to a power supply providing a higher more negative voltage level than said one voltage level, (e) first means for detecting line current in said line circuit which is lower than a first predetermined level and for enabling the switch means to close, whereby the higher voltage level is applied to the line, and (f) second means for detecting line current in said line circuit which is higher than a second predetermined level which is higher than said first predetermined level and for inhibiting the switch means from being closed, whereby the lower voltage level is applied to the line.

Claim 9

A power saving circuit comprising: (a) a subscriber's line circuit including tip and ring leads, (b) a pair of resistors, each having one terminal connected to a corresponding tip or ring lead, the other terminal of one resistor being connected to a common voltage terminal, (c) a diode having its anode connected to the other terminal of the other resistor, and its cathode connected to a power supply providing one voltage level, (d) a bipolar current switch means connecting the other terminal of the other resistor to a power supply providing a higher more negative voltage level than said one voltage level, (e) first means for detecting line current in said line circuit which is lower than a first predetermined level and for enabling the switch means to close, whereby the higher voltage level is applied to the line, and (f) second means for detecting line current in said line circuit which is higher than a second predetermined level which is higher than said first predetermined level and for inhibiting the switch means from being closed, whereby the lower voltage level is applied to the line.

Claim 10

A power saving circuit as defined in claim 6, in which the switch means is a VMOS device.

Claim 11

A power saving circuit as defined in claim 6 or 7 in which said one voltage level is about -28 volts and the higher voltage level is about -48 volts.

Claim 12

A power saving circuit as defined in claim 7 including a bistable flip flop having SET and RESET inputs and a Q output, the output of the second detecting means being connected to the SET input, the output of the first detecting means being connected to the RESET input, and the Q output being connected via a driving transistor to a gate input of the VMOS device.