Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
254 words
A system for detecting the presence of a desired signal frequency in a multi-signal environment, comprising: spectrum analyzer means adapted to sample the multi-signal environment for providing digital information indicative of real and imaginary magnitude components of the desired signal frequency; phase determinator means connected to receive the digital information from said spectrum analyzer means for producing a first digital signal indicative of the instantaneous phase of the desired signal frequency; phase precession means connected to said phase determinator means for producing a second digital signal representative of a statistical estimate of phase variation of the desired signal frequency; a first fixed storage device adapted to provide a plurality of third digital signals representative of distinct phase reference values between 0° and 360°; an adder connected to said phase precession means and said first fixed storage device for summing the second digital signal with each of the plurality of third digital signals thereby producing a plurality of fourth digital signals representative of revised phase reference values; cosine integrator means connected to said phase determinator means and said adder for producing a plurality of fifth digital signals representative of relative signal strength for each of the phase reference values; a second fixed storage device adapted to provide a sixth digital signal representative of a threshold signal value; and a comparator connected to said cosine integrator means and said second fixed storage device for indicating the presence of the desired signal frequency when any of the plurality of fifth digital signals exceeds the sixth digital signal.
Claim 2
Independent Claim
254 words
A system for detecting the presence of a desired signal frequency in a multi-signal environment, comprising: spectrum analyzer means adapted to sample the multi-signal environment for providing digital information indicative of real and imaginary magnitude components of the desired signal frequency; phase determinator means connected to receive the digital information from said spectrum analyzer means for producing a first digital signal indicative of the instantaneous phase of the desired signal frequency; phase precession means connected to said phase determinator means for producing a second digital signal representative of a statistical estimate of phase variation of the desired signal frequency; a first fixed storage device adapted to provide a plurality of third digital signals representative of distinct phase reference values between 0° and 360°; an adder connected to said phase precession means and said first fixed storage device for summing the second digital signal with each of the plurality of third digital signals thereby producing a plurality of fourth digital signals representative of revised phase reference values; cosine integrator means connected to said phase determinator means and said adder for producing a plurality of fifth digital signals representative of relative signal strength for each of the phase reference values; a second fixed storage device adapted to provide a sixth digital signal representative of a threshold signal value; and a comparator connected to said cosine integrator means and said second fixed storage device for indicating the presence of the desired signal frequency when any of the plurality of fifth digital signals exceeds the sixth digital signal.
Claim 3
Dependent Claim
69 words
A signal detection system according to claim 1, wherein said phase determinator means comprises: a pair of registers connected in parallel to said spectrum analyzer means for holding digital information indicative of real and imaginary magnitude components of the desired signal frequency; and functional divider means connected to said pair of digital registers for performing an inverse tangent operation on the quotient of the imaginary and real magnitude components.
Claim 4
Dependent Claim
90 words
A signal detection system according to claim 1, wherein said phase precession means comprises: a pair of registers connected in series of said phase determinator means for storing successively produced first digital signals; a subtractor connected to each of said pair of registers for producing a digital output signal indicative of a change in the instantaneous phase of the desired signal frequency; a recirculating adder coupled to said subtractor for summing the digital output signals thereof; and a normalizer connected to said recirculating adder for producing the second digital signal.
Claim 5
Dependent Claim
104 words
A signal detection system according to claim 1, wherein said cosine integrator means comprises: a subtractor connected to said phase determinator means and said adder for subtracting each of the plurality of fourth digital signals from the first digital signal thereby producing a plurality of phase differential outputs; a read-only memory coupled to said subtractor and stored with cosine values for producing a plurality of cosine output signals, each cosine output signal corresponding to one of the plurality of phase differential outputs; and an integrator connected to said read-only memory for integrating each of the plurality of cosine output signals over a time period.
Claim 6
Dependent Claim
19 words
A signal detection system according to claim 4, wherein said first and second fixed storage devices are read-only memories.
Claim 7
Dependent Claim
20 words
A signal detection system according to claim 5, wherein said spectrum analyzer means is a Fast Fourier Transform Spectrum analyzer.
Claim 8
Dependent Claim
227 words
A signal processor for detecting the presence of a desired signal frequency in a multi-signal environment sampled by a Fast Fourier Transform spectrum analyzer, comprising: phase determinator means connected to the spectrum analyzer for producing a first digital signal indicative of the instantaneous phase of the desired signal frequency; phase precession means connected to said phase determinator means for producing a second digital signal representative of a statistical estimate of phase variation of the desired signal frequency; a first fixed storage device adapted to provide a plurality of third digital signals representative of distinct phase reference values between 0° and 360°; an adder connected to said phase precession means and said first fixed storage device for summing the second digital signal with each of the plurality of third digital signals thereby producing a plurality of fourth digital signals representative of revised phase reference values; cosine integrator means connected to said adder for producing a plurality of fifth digital signals representative of relative signal strength for each of the phase reference values; a second fixed storage device adapted to provide a sixth digital signal representative of a threshold signal value; and a comparator connected to said cosine integrator means and said second fixed storage device for indicating the presence of the desired signal frequency when any of the plurality of fifth digital signals exceeds the sixth digital signal.
Claim 9
Dependent Claim
227 words
A signal processor for detecting the presence of a desired signal frequency in a multi-signal environment sampled by a Fast Fourier Transform spectrum analyzer, comprising: phase determinator means connected to the spectrum analyzer for producing a first digital signal indicative of the instantaneous phase of the desired signal frequency; phase precession means connected to said phase determinator means for producing a second digital signal representative of a statistical estimate of phase variation of the desired signal frequency; a first fixed storage device adapted to provide a plurality of third digital signals representative of distinct phase reference values between 0° and 360°; an adder connected to said phase precession means and said first fixed storage device for summing the second digital signal with each of the plurality of third digital signals thereby producing a plurality of fourth digital signals representative of revised phase reference values; cosine integrator means connected to said adder for producing a plurality of fifth digital signals representative of relative signal strength for each of the phase reference values; a second fixed storage device adapted to provide a sixth digital signal representative of a threshold signal value; and a comparator connected to said cosine integrator means and said second fixed storage device for indicating the presence of the desired signal frequency when any of the plurality of fifth digital signals exceeds the sixth digital signal.
Claim 10
Dependent Claim
68 words
A signal processor according to claim 7, wherein said phase determinator means comprises: a pair of registers connected in parallel to said spectrum analyzer means for holding digital information indicative of real and imaginary magnitude components of the desired signal frequency; and functional divider means connected to said pair of digital registers for performing an inverse tangent operation on the quotient of the imaginary and real magnitude components.
Claim 11
Dependent Claim
89 words
A signal processor according to claim 7, wherein said phase precession means comprises: a pair of registers connected in series to said phase determinator means for storing successively produced first digital signals; a subtractor connected to each of said pair of registers for producing a digital output signal indicative of a change in the instantaneous phase of the desired signal frequency; a recirculating adder coupled to said subtractor for summing the digital output signals thereof; and a normalizer connected to said recirculating adder for producing the second digital signal.
Claim 12
Dependent Claim
103 words
A signal processor according to claim 7, wherein said cosine integrator means comprises: a subtractor connected to said phase determinator means and said adder for subtracting each of the plurality of fourth digital signals from the first digital signal thereby producing a plurality of phase differential outputs; a read-only memory coupled to said subtractor and stored with cosine values for producing a plurality of cosine output signals, each cosine output signal corresponding to one of the plurality of phase differential outputs; and an integrator connected to said read-only memory for integrating each of the plurality of cosine output signals over a time period.
Claim 13
Dependent Claim
18 words
A signal processor according to claim 10, wherein said first and second fixed storage devices are read-only memories.