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US4408093A
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Cryptographic encoder-decoder
Assignee: ITT Inc
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Filing: 1981-06-05
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Granted: 1983-10-04
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Expires: 2001-06-05
Abstract
Abstract An electronic cryptographic encoder-decoder is disclosed which performs the equivalent operations of a known simple hand-held cryptographic encoder-decoder. The electronic cryptographic encoder-decoder includes a parallel addressable, programmable read only memory receiving parallel data input from a serial to parallel converter and providing parallel data output which is converted to a serial data output by a parallel to serial converter. The memory element has stored therein a plurality of different predetermined encryption-decryption character code groups addressed by the parallel input data and controlled by a character counting arrangement including a multiplicity of multi-contact switches to establish a unique code and to select appropriate ones of the plurality of code groups as determined by the unique code to provide the parallel output data from the memory means.
Inventors
- 👤 Harry Place
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 11:41
CPC Classifications
H; H04; H04L; H04L9/00; H04L9/06; H04L9/0618; H04L9/0637; H04L2209/00; H04L2209/12; H04L2209/125; H04L2209/56
Claims Analysis
Total Claims: 34
Claim 1
Independent Claim
84 words
A cryptographic encoder-decoder comprising: a parallel addressable memory means capable of being changed storing therein a plurality of different predetermined encryption-decryption character code groups addressed by parallel input data; and first means coupled to said memory means to establish a unique code and to select appropriate ones of said plurality of code groups as determined by said unique code to provide in response to said input data from said selected one of said plurality of code groups parallel output data from said memory means.
Claim 2
Dependent Claim
84 words
A cryptographic encoder-decoder comprising: a parallel addressable memory means capable of being changed storing therein a plurality of different predetermined encryption-decryption character code groups addressed by parallel input data; and first means coupled to said memory means to establish a unique code and to select appropriate ones of said plurality of code groups as determined by said unique code to provide in response to said input data from said selected one of said plurality of code groups parallel output data from said memory means.
Claim 3
Dependent Claim
53 words
An encoder-decoder according to claim 1, further including second means coupled to said memory means to convert serial input data to said parallel input data for coupling to said memory means; and third means coupled to said memory means to convert said parallel output data from said memory means into serial output data.
Claim 4
Dependent Claim
34 words
An encoder-decoder according to claim 2, wherein a time delay means is coupled to said memory means and said second means to control the coupling of said parallel input data to said memory means.
Claim 5
Dependent Claim
37 words
An encoder-decoder according to claim 3, wherein said third means is coupled to said time delay means to ensure said third means provides a character output therefrom every time a character is received by said memory means.
Claim 6
Dependent Claim
20 words
An encoder-decoder according to claims 1, 2, 3 or 4, wherein said memory means is a programmable read only memory.
Claim 7
Dependent Claim
17 words
An encoder-decoder according to claim 5, wherein said read only memory is an erasable read only memory.
Claim 8
Dependent Claim
38 words
An encoder-decoder according to claim 5, wherein said read only memory is a plug-in programmable read only memory interchangeable with other plug-in programmable read only memories having said plurality of code groups changed therein in a predetermined manner.
Claim 9
Dependent Claim
126 words
An encoder-decoder according to claim 5, wherein said first means includes cyclic counting means coupled to an additional output of said memory means to count each character received by said memory means, decoding means coupled to said counter to provide an output on one of a plurality of output lines for each count of said counter, a plurality of multi-contact switch means each coupled to selected ones of said plurality of output lines, settings of said plurality of switch means establishing said unique code, and encoding means coupled to each of said plurality of switch means and said memory means to provide a binary address to select appropriate ones of said plurality of code groups as determined by said settings of said plurality of switch means.
Claim 10
Dependent Claim
63 words
An encoder-decoder according to claim 8, wherein said counting means is a decade counter, said decoding means is a decade decoder, each of said plurality of switch means is a selected one of a rotary switch and a thumbwheel switch, and said encoding means is an encoder response to a single output of said plurality of switch means to provide said binary address.
Claim 11
Dependent Claim
41 words
An encoder-decoder according to claim 8, wherein said plurality of code groups are an even number of code groups and one half of said plurality of code groups are the inverse of the other half of said plurality of code groups.
Claim 12
Dependent Claim
23 words
An encoder-decoder according to claim 10, wherein said counting means has a count equal to said number of said plurality of code groups.
Claim 13
Dependent Claim
63 words
An encoder-decoder according to claim 11, wherein each of said plurality of switch means includes two poles each connected to a different one of said plurality of output lines spaced by an amount equal to one half of said count of said cyclic counter and connected to a contact of its associated one of said plurality of switch means spaced by said amount.
Claim 14
Dependent Claim
50 words
An encoder-decoder according to claim 12, wherein said additional output of said memory means provides a first binary output to clock said counting means when said memory means receives printing characters and a second binary output to inhibit counting of said counting means when said memory means receives non-printing characters.
Claim 15
Dependent Claim
77 words
An encoder-decoder according to claim 13, wherein said memory means is programmed to provide said first binary output at said additional output when said printing characters are received, and is programmed to have said non-printing characters repeated in each of said plurality of code groups and to provide said second binary output at said additional output when said non-printing characters are received, said non-printing characters being read out of said memory means without encryption when received thereby.
Claim 16
Dependent Claim
24 words
An encoder-decoder according to claim 14, wherein said first binary output is a binary one and said second binary output is a binary zero.
Claim 17
Dependent Claim
48 words
An encoder-decoder according to claim 13, further including a NAND gate having its output coupled to a clock input of said counting means, a first input coupled to said additional output of said memory means and a second input receiving a data-received pulse to clock said counting means.
Claim 18
Dependent Claim
125 words
An encoder-decoder according to claim 12, further including a momentary contact switch coupled to said counting means, ground and a positive voltage to reset said counting means to one of two count starting points; and a toggle switch coupled to said counting means, ground and said positive voltage to select an encrypt mode of operation when said counting means is connected to ground and to select a decrypt mode of operation when said counting means is connected to said positive voltage; said contact switch resetting said counting means to zero when said toggle switch selects said encrypt mode of operation and resetting said counting means to one half of the count of said counting means when said toggle switch selects said decrypt mode of operation.
Claim 19
Dependent Claim
47 words
An encoder-decoder according to claim 8, further including a NAND gate having its output to a clock input of said counting means, a first input coupled to an additional output of said memory means and a second input receiving a data-received pulse to clock said counting means.
Claim 20
Dependent Claim
125 words
An encoder-decoder according to claim 18, further including a momentary contact switch coupled to said counting means, ground and a positive voltage to reset said counting means to one of two count starting points; and a toggle switch coupled to said counting means, ground and said positive voltage to select an encrypt mode of operation when said counting means is connected to ground and to select a decrypt mode of operation when said counting means is connected to said positive voltage; said contact switch resetting said counting means to zero when said toggle switch selects said encrypt mode of operation and resetting said counting means to one half of the count of said counting means when said toggle switch selects said decrypt mode of operation.
Claim 21
Dependent Claim
125 words
An encoder-decoder according to claim 8, further including a momentary contact switch coupled to said counting means, ground and a positive voltage to reset said counting means to one of two count starting points; and a toggle switch coupled to said counting means, ground and said positive voltage to select an encrypt mode of operation when said counting means is connected to ground and to select a decrypt mode of operation when said counting means is connected to said positive voltage; said contact switch resetting said counting means to zero when said toggle switch selects said encrypt mode of operation and resetting said counting means to one half of the count of said counting means when said toggle switch selects said decrypt mode of operation.
Claim 22
Dependent Claim
128 words
An encoder-decoder according to claim 1 or 2, wherein said first means includes cyclic counting means coupled to an additional output of said memory means to count each character received by said memory means, decoding means coupled to said counter to provide an output on one of a plurality of output lines for each count of said counter, a plurality of multi-contact switch, means each coupled to selected ones of said plurality of output lines, settings of said plurality of switch means establishing said unique code, and encoding means coupled to each of said plurality of switch means and said memory means to provide a binary address to select appropriate ones of said plurality of code groups as determined by said settings of said plurality of switch means.
Claim 23
Dependent Claim
63 words
An encoder-decoder according to claim 21, wherein said counting means is a decade counter, said decoding means is a decade decoder, each of said plurality of switch means is a selected one of a rotary switch and a thumbwheel switch, and said encoding means is an encoder response to a single output of said plurality of switch means to provide said binary address.
Claim 24
Dependent Claim
41 words
An encoder-decoder according to claim 21, wherein said plurality of code groups are an even number of code groups and one half of said plurality of code groups are the inverse of the other half of said plurality of code groups.
Claim 25
Dependent Claim
23 words
An encoder-decoder according to claim 23, wherein said counting means has a count equal to said number of said plurality of code groups.
Claim 26
Dependent Claim
63 words
An encoder-decoder according to claim 24, wherein each of said plurality of switch means includes two poles each connected to a different one of said plurality of output lines spaced by an amount equal to one half of said count of said cyclic counter and connected to a contact of its associated one of said plurality of switch means spaced by said amount.
Claim 27
Dependent Claim
50 words
An encoder-decoder according to claim 25, wherein said additional output of said memory means provides a first binary output to clock said counting means when said memory means receives printing characters and a second binary output to inhibit counting of said counting means when said memory means receives non-printing characters.
Claim 28
Dependent Claim
77 words
An encoder-decoder according to claim 26, wherein said memory means is programmed to provide said first binary output at said additional output when said printing characters are received, and is programmed to have said non-printing characters repeated in each of said plurality of code groups and to provide said second binary output at said additional output when said non-printing characters are received, said non-printing characters being read out of said memory means without encryption when received thereby.
Claim 29
Dependent Claim
24 words
An encoder-decoder according to claim 27, wherein said first binary output is a binary one and said second binary output is a binary zero.
Claim 30
Dependent Claim
48 words
An encoder-decoder according to claim 26, further including a NAND gate having its output coupled to a clock input of said counting means, a first input coupled to said additional output of said memory means and a second input receiving a data-received pulse to clock said counting means.
Claim 31
Dependent Claim
125 words
An encoder-decoder according to claim 25, further including a momentary contact switch coupled to said counting means, ground and a positive voltage to reset said counting means to one of two count starting points; and a toggle switch coupled to said counting means, ground and said positive voltage to select an encrypt mode of operation when said counting means is connected to ground and to select a decrypt mode of operation when said counting means is connected to said positive voltage; said contact switch resetting said counting means to zero when said toggle switch selects said encrypt mode of operation and resetting said counting means to one half of the count of said counting means when said toggle switch selects said decrypt mode of operation.
Claim 32
Dependent Claim
47 words
An encoder-decoder according to claim 21, further including a NAND gate having its output to a clock input of said counting means, a first input coupled to an additional output of said memory means and a second input receiving a data-received pulse to clock said counting means.
Claim 33
Dependent Claim
125 words
An encoder-decoder according to claim 31, further including a momentary contact switch coupled to said counting means, ground and a positive voltage to reset said counting means to one of two count starting points; and a toggle switch coupled to said counting means, ground and said positive voltage to select an encrypt mode of operation when said counting means is connected to ground and to select a decrypt mode of operation when said counting means is connected to said positive voltage; said contact switch resetting said counting means to zero when said toggle switch selects said encrypt mode of operation and resetting said counting means to one half of the count of said counting means when said toggle switch selects said decrypt mode of operation.
Claim 34
Dependent Claim
125 words
An encoder-decoder according to claim 31, further including a momentary contact switch coupled to said counting means, ground and a positive voltage to reset said counting means to one of two count starting points; and a toggle switch coupled to said counting means, ground and said positive voltage to select an encrypt mode of operation when said counting means is connected to ground and to select a decrypt mode of operation when said counting means is connected to said positive voltage; said contact switch resetting said counting means to zero when said toggle switch selects said encrypt mode of operation and resetting said counting means to one half of the count of said counting means when said toggle switch selects said decrypt mode of operation.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1986-10-03 | 1987-04-04 | 1987-10-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1990-10-03 | 1991-04-04 | 1991-10-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1994-10-03 | 1995-04-04 | 1995-10-04 | $7700.00 | Window Closed / Lapsed |