US4404659A
Expired / Lapsed
US
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Programmable read only memory
Assignee: Hitachi Ltd
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Filing: 1980-10-03
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Granted: 1983-09-13
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Expires: 2000-10-03
Abstract
Abstract A programmable read only memory consists of a plurality of FAMOS's having a control gate. Control gates of the plurality of FAMOS's arrayed along the same row are commonly connected to a word line, and drains of the plurality of FAMOS's arrayed along the same column are commonly connected to a bit line. Sources of the plurality of FAMOS's are commonly connected, and are connected to a ground point of the circuit via resistance means. Bit lines which are selected when the data is to be written are provided with a high voltage. Floating gates of the non-selected FAMOS's are coupled by parasitic capacity which exists between the floating gate and the drain. Therefore, when the voltage of the bit line is raised, the voltage of the floating gate is undesirably raised correspondingly. In this case, however, voltage drops across said resistance means owing to the writing current which flows through the selected FAMOS, and the potential of the commonly connected sources is raised by the drop in the voltage. Consequently, the non-selected FAMOS's are properly maintained in the non-conductive state despite the fact that the potential of the floating gate is raised as mentioned above.
Inventors
- 👤 Toshimasa Kihara
- 👤 Toshifumi Inoue
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 07:07
CPC Classifications
G; G11; G11C; G11C16/00; G11C16/02; G11C16/06; G11C16/10; G11C16/32
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
199 words
A programmable read only memory comprising: a bit line; a common source line; a plurality of word lines; word line selection means; writing voltage generator means which applies a writing voltage to said bit line; a plurality of memory insulated gate field effect transistors, each having a control gate connected to a corresponding word line, a floating gate, a drain commonly connected to said bit line, and a source commonly connected to said common source line, an electric charge which serves as writing data being injected into the floating gate of selected insulated gate field effect transistors when the writing voltage and a word line selection voltage are fed to the drain and control gate thereof; and source voltage generator means which applies a predetermined voltage to said common source line, said predetermined voltage having a level which causes insulated gate field effect transistors which are not selected to be non-conductive when the writing voltage and the word line section voltage are fed to a selected insulated gate field transistor through said bit line and one of said word lines by preventing a leakage current from flowing from said bit line to the non-selected insulated gate field effect transistors.
Claim 2
Dependent Claim
199 words
A programmable read only memory comprising: a bit line; a common source line; a plurality of word lines; word line selection means; writing voltage generator means which applies a writing voltage to said bit line; a plurality of memory insulated gate field effect transistors, each having a control gate connected to a corresponding word line, a floating gate, a drain commonly connected to said bit line, and a source commonly connected to said common source line, an electric charge which serves as writing data being injected into the floating gate of selected insulated gate field effect transistors when the writing voltage and a word line selection voltage are fed to the drain and control gate thereof; and source voltage generator means which applies a predetermined voltage to said common source line, said predetermined voltage having a level which causes insulated gate field effect transistors which are not selected to be non-conductive when the writing voltage and the word line section voltage are fed to a selected insulated gate field transistor through said bit line and one of said word lines by preventing a leakage current from flowing from said bit line to the non-selected insulated gate field effect transistors.
Claim 3
Dependent Claim
33 words
A programmable read only memory according to claim 1, wherein said source voltage generator means comprises a resistor element which is connected between said common source line and ground point of the circuit.
Claim 4
Dependent Claim
36 words
A programmable read only memory according to claim 1, wherein said source voltage generator means comprises an insulated gate field effect transistor which is connected between said common source line and ground point of the circuit.
Claim 5
Dependent Claim
78 words
A programmable read only memory according to claim 1, wherein said source voltage generator means comprises a variable resistor which is connected between said common source line and ground point of the circuit, which assumes a relatively high resistance when the data is to be written on said insulated gate field effect transistor for memory, and which assumes a relatively low resistance when the data is to be read from said insulated gate field effect transistor for memory.
Claim 6
Dependent Claim
26 words
A programmable read only memory according to claim 4, wherein said variable resistor means, comprises an insulated gate field effect transistor of the depletion mode type.
Claim 7
Dependent Claim
291 words
A programmable read only memory comprising: a plurality of insulated gate field effect transistors for memory, each having a control gate connected to a corresponding word line, a floating gate, a drain commonly connected to a first bit line, and a source connected to a common source line, an electric charge which serves as writing data being injected into the floating gate of selected insulated gate field transistors when a writing voltage and a word line selection voltage are fed to the drain and the control gate thereof; a plurality of insulated gate field effect transistors for memory, each having a control gate connected to said corresponding word line, a floating gate, a drain commonly connected to a second bit line, and a source commonly connected to said common source line, an electric charge which serves as writing data being injected into the floating gate of selected insulated gate field effect transistors when the writing voltage and the word line selection voltage are fed to the drain and the control gate thereof; word line selection means; bit line selection means; writing voltage generator means which applies the writing voltage to said insulated gate field effect transistors via said bit line selection means; and source voltage generator means which applies a predetermined voltage to said common source line, said predetermined voltage having a level which causes insulated gate field effect transistors which are not selected to be non-conductive when the writing voltage and the word line selection voltage are fed to a selected insulated gate field effect transistor through one of said bit lines and one of said word lines by preventing a leakage current from flowing from said one of said bit lines to the non-selected insulated gate field effect transistors.
Claim 8
Dependent Claim
291 words
A programmable read only memory comprising: a plurality of insulated gate field effect transistors for memory, each having a control gate connected to a corresponding word line, a floating gate, a drain commonly connected to a first bit line, and a source connected to a common source line, an electric charge which serves as writing data being injected into the floating gate of selected insulated gate field transistors when a writing voltage and a word line selection voltage are fed to the drain and the control gate thereof; a plurality of insulated gate field effect transistors for memory, each having a control gate connected to said corresponding word line, a floating gate, a drain commonly connected to a second bit line, and a source commonly connected to said common source line, an electric charge which serves as writing data being injected into the floating gate of selected insulated gate field effect transistors when the writing voltage and the word line selection voltage are fed to the drain and the control gate thereof; word line selection means; bit line selection means; writing voltage generator means which applies the writing voltage to said insulated gate field effect transistors via said bit line selection means; and source voltage generator means which applies a predetermined voltage to said common source line, said predetermined voltage having a level which causes insulated gate field effect transistors which are not selected to be non-conductive when the writing voltage and the word line selection voltage are fed to a selected insulated gate field effect transistor through one of said bit lines and one of said word lines by preventing a leakage current from flowing from said one of said bit lines to the non-selected insulated gate field effect transistors.
Claim 9
Dependent Claim
216 words
A programmable read only memory comprising: a plurality of insulated gate field effect transistors for memory, each having a control gate connected to a corresponding word line, a floating gate, a drain commonly connected to a first bit line, and a source commonly connected to a first common source line, an electric charge which serves a writing data being injected into the floating gate of selected insulated gate field effect transistors when the writing voltage and the word line selection voltage are fed to the drain and the control gate thereof; word line selection means; bit line selection means; writing voltage generator means which applies the writing voltage to said insulated gate field effect transistors for memory via said bit line selection means; and source voltage generator means which commonly applies a predetermined voltage to said first and second common source lines, said predetermined voltage having a level which causes insulated gate field effect transistors which are not selected to be non-conductive when the writing voltage and the word line selection voltage are fed to a selected insulated gate field effect transistor through one of said bit lines and one of said word lines by preventing a leakage current from flowing from said one of said bit lines to the non-selected insulated gate field effect transistors.
Claim 10
Dependent Claim
216 words
A programmable read only memory comprising: a plurality of insulated gate field effect transistors for memory, each having a control gate connected to a corresponding word line, a floating gate, a drain commonly connected to a first bit line, and a source commonly connected to a first common source line, an electric charge which serves a writing data being injected into the floating gate of selected insulated gate field effect transistors when the writing voltage and the word line selection voltage are fed to the drain and the control gate thereof; word line selection means; bit line selection means; writing voltage generator means which applies the writing voltage to said insulated gate field effect transistors for memory via said bit line selection means; and source voltage generator means which commonly applies a predetermined voltage to said first and second common source lines, said predetermined voltage having a level which causes insulated gate field effect transistors which are not selected to be non-conductive when the writing voltage and the word line selection voltage are fed to a selected insulated gate field effect transistor through one of said bit lines and one of said word lines by preventing a leakage current from flowing from said one of said bit lines to the non-selected insulated gate field effect transistors.
Claim 11
Dependent Claim
186 words
A programmable read only memory comprising: a bit line; a common source line; a plurality of word lines; word line selection means; writing voltage generator means which applies a writing voltage to said bit line; a plurality of memory insulated gate field effect transistors, each having a control gate connected to a corresponding word line, a floating gate, a drain commonly connected to said bit line, and a source commonly connected to said common source line, an electric charge which serves as writing data being injected into the floating gate of selected insulated gate field effect transistors when the writing voltage and a word line selection voltage are fed to the drain and control gate thereof; and means coupled to said common source line for preventing a leakage current from flowing from said bit line to insulated gate field effect transistors which are not selected when the writing voltage and the word line selection voltage are fed to a selected insulated gate field effect transistor through said bit line and one of said word lines so that said non-selected insulated gate field effect transistors are non-conductive.
Claim 12
Dependent Claim
186 words
A programmable read only memory comprising: a bit line; a common source line; a plurality of word lines; word line selection means; writing voltage generator means which applies a writing voltage to said bit line; a plurality of memory insulated gate field effect transistors, each having a control gate connected to a corresponding word line, a floating gate, a drain commonly connected to said bit line, and a source commonly connected to said common source line, an electric charge which serves as writing data being injected into the floating gate of selected insulated gate field effect transistors when the writing voltage and a word line selection voltage are fed to the drain and control gate thereof; and means coupled to said common source line for preventing a leakage current from flowing from said bit line to insulated gate field effect transistors which are not selected when the writing voltage and the word line selection voltage are fed to a selected insulated gate field effect transistor through said bit line and one of said word lines so that said non-selected insulated gate field effect transistors are non-conductive.
Claim 13
Dependent Claim
35 words
A programmable read only memory according to claim 8, wherein said leakage current preventing means comprises a voltage generator for holding said common source line at a predetermined potential sufficient for preventing said leakage current.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1986-09-12 | 1987-03-14 | 1987-09-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1990-09-12 | 1991-03-14 | 1991-09-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1994-09-12 | 1995-03-14 | 1995-09-13 | $7700.00 | Window Closed / Lapsed |